https://elinux.org/api.php?action=feedcontributions&user=Dvhart&feedformat=atomeLinux.org - User contributions [en]2024-03-29T02:13:42ZUser contributionsMediaWiki 1.31.0https://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=384696Minnowboard:MinnowMaxYoctoProject2015-07-13T17:35:49Z<p>Dvhart: /* Exact Steps */</p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release (and later versions).<br />
<br />
The MinnowBoard-MAX ships with 64b firmware. If you wish to use it in 32b mode, you will need to [https://uefidk.com/content/minnowboard-max download the 32b firmware].<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b fido git://git.yoctoproject.org/poky<br />
$ cd poky<br />
$ git clone -b fido git://git.yoctoproject.org/meta-intel<br />
<br />
''Note:'' Please replace '''fido''' with the release of your choice ('''daisy''' or later) [https://wiki.yoctoproject.org/wiki/Releases release of Yocto project].<br />
<br />
Initialize the build environment:<br />
<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX. First, add the meta-intel which contains the intel-core* BSPs:<br />
<br />
$ echo "BBLAYERS += \"$HOME/source/poky/meta-intel\"" >> conf/bblayers.conf<br />
<br />
Second, select the BSP by setting the MACHINE variable. If you want a 64bit build, use:<br />
<br />
$ echo "MACHINE = \"intel-corei7-64\"" >> conf/local.conf<br />
<br />
Or, if you want 32b images, use:<br />
<br />
$ echo "MACHINE = \"intel-core2-32\"" >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$ sudo $HOME/source/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32<br />
<br />
=Next Steps=<br />
Now that you can build a basic image, you can experiment with some of the other example images:<br />
<br />
$ bitbake core-image-sato<br />
$ bitbake core-image-sato-sdk<br />
<br />
Or create your own image recipes, adding packages to suit your needs. For details on developing with the Yocto Project, please see the [https://www.yoctoproject.org/documentation Yocto Project Documentation].<br />
<br />
[[Category:MinnowBoard]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=384691Minnowboard:MinnowMaxYoctoProject2015-07-13T17:34:28Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release (and later versions).<br />
<br />
The MinnowBoard-MAX ships with 64b firmware. If you wish to use it in 32b mode, you will need to [https://uefidk.com/content/minnowboard-max download the 32b firmware].<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b dizzy git://git.yoctoproject.org/poky<br />
$ cd poky<br />
$ git clone -b dizzy git://git.yoctoproject.org/meta-intel<br />
<br />
''Note:'' Please replace '''dizzy''' with '''daisy''' if you want to use the older [https://wiki.yoctoproject.org/wiki/Releases release of Yocto project].<br />
<br />
Initialize the build environment:<br />
<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX. First, add the meta-intel which contains the intel-core* BSPs:<br />
<br />
$ echo "BBLAYERS += \"$HOME/source/poky/meta-intel\"" >> conf/bblayers.conf<br />
<br />
Second, select the BSP by setting the MACHINE variable. If you want a 64bit build, use:<br />
<br />
$ echo "MACHINE = \"intel-corei7-64\"" >> conf/local.conf<br />
<br />
Or, if you want 32b images, use:<br />
<br />
$ echo "MACHINE = \"intel-core2-32\"" >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$ sudo $HOME/source/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32<br />
<br />
=Next Steps=<br />
Now that you can build a basic image, you can experiment with some of the other example images:<br />
<br />
$ bitbake core-image-sato<br />
$ bitbake core-image-sato-sdk<br />
<br />
Or create your own image recipes, adding packages to suit your needs. For details on developing with the Yocto Project, please see the [https://www.yoctoproject.org/documentation Yocto Project Documentation].<br />
<br />
[[Category:MinnowBoard]]</div>Dvharthttps://elinux.org/index.php?title=Tadpole_Lure&diff=377516Tadpole Lure2015-04-03T05:24:35Z<p>Dvhart: Correct duplicate R4</p>
<hr />
<div>[[File:Tadpole-installed.jpg|200px|Tadpole Lure on MinnowBoard Max]]<br />
<br />
= Description =<br />
The Tadpole Lure is a low cost "Mini-Lure" design providing a single RGB LED and a breakout/prototype area.<br />
<br><br />
<br><br />
<br />
= Components =<br />
[[File:Tadpole-kit.jpg|400px|right|Tadpole Components]]<br />
* 3 [http://www.digikey.com/product-detail/en/0/2N3906-APCT-ND 2N3906 PNP Transistors]<br />
* 1 [http://www.digikey.com/product-detail/en/0/754-1492-ND RGB LED]<br />
* 1 [http://www.digikey.com/product-detail/en/0/CF18JT12R0CT-ND 12 Ohm 1/8 Resistor]<br />
* 2 [http://www.digikey.com/product-detail/en/0/CF18JT68R0CT-ND 68 Ohm 1/8 Resistors]<br />
* 3 [http://www.digikey.com/product-detail/en/0/CF18JT4K70CT-ND 4.7k Ohm 1/8 Resistors]<br />
* 1 [http://www.digikey.com/product-detail/en/0/S9198-ND 2x13 0.1" Female Connector]<br />
* 1 PCB<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
= Design Files =<br />
The Tadpole Lure is an "Open Source Hardware" compatible device and is licensed under Creative Commons Attribution-ShareAlike 3.0 United States (CC BY-SA 3.0)<br />
[[File:Oshw-logo.png|100px|right]]<br />
* [[media:tadpole-sch.pdf|Schematic PDF]]<br />
* [[media:tadpole.zip|Eagle CAD Files]]<br />
* [[media:tadpole-gerbers.zip|Gerbers Files]]<br />
<br><br />
<br><br />
<br />
= Assembly =<br />
== Getting Started ==<br />
[[File:Tadpole-getting-started.jpg|220px|right|Getting Started]]<br />
To assemble the Tadpole Lure, a soldering iron (15Watt to 30Watt), some solder, and a pair of wire cutters.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== R1 12 Ohm Resistor ==<br />
[[File:Tadpole-12ohm.jpg|220px|right|12 Ohm Resistor]]<br />
There is a single resistor with the color code BROWN-RED-BLACK. This one is used for the resistor position marked R1.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== R2/R3 68 Ohm Resistors ==<br />
[[File:Tadpole-68ohm.jpg|220px|right|68 Ohm Resistors]]<br />
There are two resistors with the color code BLUE-GREY-BLACK. These are used for resistor positions marked R2 and R3.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== R4/R5/R6 4.7K Ohm Resistors ==<br />
[[File:Tadpole-4k7ohm.jpg|220px||right|4.7K Ohm Resistors]]<br />
There are three resistors with the color code YELLOW-VIOLET-RED. These are used for the resistor positions marked R4, R5 and R6.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== RGB LED ==<br />
[[File:Tadpole-led-aligned.jpg|220px|right|RGB LED Alignment]]<br />
[[File:Tadpole-led.jpg|220px|right|RGB LED]]<br />
The single RGB LED in the kit is mounted with the longest lead as the second hole from the side with a flat edge. The LED package has a flat side. The flat side is matched up with the white line marking on the PCB.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== Transistors ==<br />
[[File:Tadpole-transistors.jpg|220px|right|Transistors]]<br />
Three 2N3906 PNP transistors are included with the kit. Each transistor is mounted on the PCB with the flat side of the transistor matching the markings on the PCB.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== Connector ==<br />
[[File:Tadpole-connector.jpg|220px|right|Connector]]<br />
The 2 row by 13 pin connector is mounted to the bottom of the PCB. The connector has a piece of plastic marking the "key side". The "key side" of the connector points to the outside of the PCB.<br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br><br />
<br />
== Completed ==<br />
[[File:Tadpole-completed.jpg|220px|right|Completed]]<br />
[[Category:MinnowBoard]]<br />
[[Category:MinnowBoard Expansion Boards]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=371444Minnowboard:MinnowMaxYoctoProject2015-02-12T19:35:14Z<p>Dvhart: /* Exact Steps */</p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
The MinnowBoard-MAX ships with 64b firmware. If you wish to use it in 32b mode, you will need to [https://uefidk.com/content/minnowboard-max download the 32b firmware].<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b daisy git://git.yoctoproject.org/poky<br />
$ git clone -b daisy git://git.yoctoproject.org/meta-intel<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX. First, add the meta-intel which contains the intel-core* BSPs:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
<br />
Second, select the BSP by setting the MACHINE variable. If you want a 64bit build, use:<br />
<br />
$ echo 'MACHINE = "intel-corei7-64"' >> conf/local.conf<br />
<br />
Or, if you want 32b images, use:<br />
<br />
$ echo 'MACHINE = "intel-core2-32"' >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32<br />
<br />
=Next Steps=<br />
Now that you can build a basic image, you can experiment with some of the other example images:<br />
<br />
$ bitbake core-image-sato<br />
$ bitbake core-image-sato-sdk<br />
<br />
Or create your own image recipes, adding packages to suit your needs. For details on developing with the Yocto Project, please see the [https://www.yoctoproject.org/documentation Yocto Project Documentation].</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=371438Minnowboard:MinnowMaxYoctoProject2015-02-12T19:34:47Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
The MinnowBoard-MAX ships with 64b firmware. If you wish to use it in 32b mode, you will need to [https://uefidk.com/content/minnowboard-max download the 32b firmware].<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b daisy git://git.yoctoproject.org/poky<br />
$ git clone -b daisy git://git.yoctoproject.org/meta-intel<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX. First, add the meta-intel which contains the intel-core* BSPs:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
<br />
Second, select the BSP by setting the MACHINE variable. If you want a 64bit build, use:<br />
<br />
$ echo 'MACHINE = "intel-corei7-64"' >> conf/local.conf<br />
<br />
Or, if you want 32b images, use:<br />
<br />
$ echo 'MACHINE = "intel-core2-32"' >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32<br />
<br />
=Next Steps=<br />
Now that you can build a basic image, you can experiment with some of the other example images:<br />
<br />
$ bitbake core-image-sato<br />
$ bitbake core-image-sato-sdk<br />
<br />
Or create your own image recipes, adding packages to suit your needs. For details on developing with the Yocto Project, please see the [https://www.yoctoproject.org/documentation Yocto Project Documentation].</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxLinuxKernel&diff=355676Minnowboard:MinnowMaxLinuxKernel2014-10-26T03:10:15Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard MAX has had mainline ([http://kernel.org Kernel.org]) Linux kernel support since 3.14, with some caveats. If using 3.14, you will want use the ACPI enumeration mode for the LPSS devices. If you want to use PCI enumeration, there are some needed PCI fixes for SPI that landed in the 3.16 kernel. Additional improvements to DRM and other areas are still making their way upstream. 3.18 is looking to be solid version for Bay Trail SoC support, including the Intel Atom E38** SoCs found on the MinnowBoard MAX.<br />
<br />
While the x86_64 defconfig will boot the MinnowBoard MAX, you will likely want to enable various busses and IO devices to make the most of the board. The following configuration fragment is a good starting point:<br />
<br />
[[File:Minnowmax-3.18.txt]]<br />
<br />
To use it, you'll need to combine it with the x86_64 defconfig. If building on an x86_64 host, perform the following:<br />
<br />
$ cd /path/to/linux<br />
$ make defconfig<br />
$ wget http://www.elinux.org/images/e/e2/Minnowmax-3.18.txt<br />
$ scripts/kconfig/merge_config.sh .config Minnowmax-3.18.txt<br />
<if all you see are overrides converting Y to M or similar, everything went according to plan><br />
$ make -j4 && make -j4 modules<br />
<br />
Then install the kernel and modules according to your environment.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMax&diff=355664Minnowboard:MinnowMax2014-10-26T01:59:55Z<p>Dvhart: /* Resources */</p>
<hr />
<div>[[File:Minnowboard.org.png|center|800px]]<br />
<br />
{| class="wikitable" style="float: right;font-size: 75%;" width="25%"<br />
! Category || Feature<br />
|-<br />
! rowspan="2" | Core Logic<br />
|<br />
* 64-bit Intel® Atom™ E38xx Series SoC<br />
** $99 MSRP: E3815 (single-core, 1.46 GHz)<br />
** $139 MSRP: E3825 (dual-core, 1.33 GHz)<br />
[[Minnowboard:MinnowMaxCPU|CPU Information]] <br />
|-<br />
| Integrated Intel® HD Graphics With Open Source hardware-accelerated drivers for Linux OS<br />
|-<br />
! rowspan="2" | Memory<br />
|<br />
* DDR3 RAM<br/>System Memory<br />
** $99 MSRP: 1 GB<br />
** $139 MSRP: 2 GB<br />
|-<br />
| 8 MB SPI Flash <br/> System Firmware Memory<br />
|-<br />
! Video<br />
| Intel® HD Graphics <br/><br />
HDMI (micro HDMI connector) <br/><br />
1920x1080 max resolution <br/><br />
HDMI 1.4a<br />
|-<br />
! rowspan="2" | Audio<br />
| Digital <br/><br />
via HDMI<br />
|-<br />
| Analog <br/><br />
To be available separately via MinnowBoard MAX Lure (sold separately)<br />
|-<br />
! rowspan="6" | I/O<br />
| 1 – Micro SDSDIO<br />
|-<br />
| 1 – SATA2 3Gb/sec<br/>(Port multipliers not supported via on-board SATA)<br />
|-<br />
| 1 – USB 3.0 (host)<br />
|-<br />
| 1 – USB 2.0 (host)<br />
|-<br />
| 1 – Serial debug <br/><br />
via FTDI cable (sold separately)<br />
|-<br />
| 10/100/1000 Ethernet <br/><br />
RJ-45 connector<br />
|-<br />
! rowspan="3" | Experimenter<br/>Features<br />
| 8 – Buffered GPIO pins 2 pins support PWM<br />
|-<br />
| I2C & SPI bus <br />
|-<br />
| System Firmware Flash<br/><br />
Programming Header <br/><br />
Compatible with Dedi-Prog programmer<br />
|-<br />
! Board Dimensions<br />
| 99 x 74mm (2.9 x 3.9in)<br />
|-<br />
! Temperature Range<br />
| 0 – 70 deg C <br/><br />
Contact CirtcuitCo for industrial temp range needs<br />
|-<br />
! Power<br />
| 5V DC <br/><br />
Sold separately in configurations appropriate to your region<br />
|-<br />
! Operating Systems<br />
|<br />
* '''Supported:'''<br />
** Debian GNU/Linux<br />
** [[Minnowboard:MinnowMaxYoctoProject|Yocto Project Compatible]]<br />
** Android 4.4 System<br />
** [http://www.msdn.microsoft.com/hardwaredevboard Windows 8.1]<br />
* '''Unsupported <br/> (but known to work):'''<br />
** Fedora<br />
** CentOS<br />
** Linux Mint<br />
<br />
[[Minnowboard:MinnowMaxDistros|Setting up / Installing Linux]]<br />
|-<br />
!rowspan="2" | System Boot Firmware<br />
| UEFI Firmware<br />
|-<br />
| Coreboot (in development)<br />
|-<br />
|colspan="2"|'''Note:''' These features may be subject to change without notice. Hardware design files will be made available shortly after the board enters final production. Current estimate of public availability is '''June 2014'''.<br />
|-<br />
|}<br />
<br />
[[File:MinnowBoard_MAX-Top-Angled.jpg|510px|MinnowBoard MAX]]<br />
<br />
=== Resources ===<br />
----<br />
{| width="60%"<br />
|-<br />
| width="50%" style="vertical-align: top;" |<br />
* [[Minnowboard:MaxBoot|Booting the MinnowBoard MAX]]<br />
* [[Minnowboard:MaxBios|Getting to the BIOS]]<br />
* [[Minnowboard:MaxLPSSSetup|Setting GPIO pin mux states]]<br />
| width="50%" style="vertical-align: top;" |<br />
* [http://www.minnowboard.org MinnowBoard Project Page]<br />
* [http://www.intel.com/content/www/us/en/intelligent-systems/bay-trail/atom-processor-e3800-family-overview.html Intel Atom E38xx Pages]<br />
* [[Minnowboard:FAQ|MinnowBoard FAQ]]<br />
* [[Minnowboard:Hardware_Revisions|MinnowBoard Hardware Revisions]]<br />
* [[Minnowboard:MinnowMaxDistros|Setting up / Installing Linux for the MinnowBoard MAX]]<br />
* [[Minnowboard:MinnowMaxYoctoProject|Using the Yocto Project with the MinnowBoard MAX]]<br />
* [[Minnowboard:MinnowMaxLinuxKernel|Configuring and building the Linux kernel for the MinnowBoard MAX]]<br />
|}<br />
<br><br />
<br><br />
<br />
==== Firmware ====<br />
<br />
* UEFI (Intel)<br />
** [https://uefidk.com/content/minnowboard-max https://uefidk.com/content/minnowboard-max]<br />
* Coreboot<br />
** [http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=e6df041b8bf8e37debc0d6a871080b64eea7a372 http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=e6df041b8bf8e37debc0d6a871080b64eea7a372]]<br />
<br />
==== Cases ====<br />
<br />
* Half cases<br />
** John 'Warthog9' Hawley's<br />
*** [https://github.com/warthog9/minnowboardmax-case https://github.com/warthog9/minnowboardmax-case]<br />
*** [http://www.thingiverse.com/thing:389100 http://www.thingiverse.com/thing:389100]<br />
*** [http://www.shapeways.com/model/2205839/minnowboard-max-half-case.html?li=search-results&materialId=99 http://www.shapeways.com/model/2205839/minnowboard-max-half-case.html?li=search-results&materialId=99]<br />
*** https://www.youtube.com/watch?v=WKLuHodiSfc<br />
<br />
=== Accessories (Lures) ===<br />
* Information on Lures can be found on the [[MinnowBoard:MaxLures|MinnowBoard MAX Lure wiki page]]<br />
<br><br />
<br><br />
<br />
=== Hardware Notes ===<br />
----<br />
==== Board Layout ====<br />
[[File:MinnowBoardMAX-board-layout1.png|700px|MinnowBoard MAX Board Layout 1]]<br/><br />
[[File:MinnowBoardMAX-board-layout2.png|700px|MinnowBoard MAX Board Layout 2]]<br/><br />
[[File:MinnowBoardMAX-board-layout3.png|700px|MinnowBoard MAX Board Layout 3]]<br/><br />
==== Power Plug ====<br />
<br />
{|<br />
|- style="vertical-align:top;"<br />
|The Minnowboard Max uses a 5.5 x 2.1mm barrel 5V power plug, and if bundled will ship with a 2.5A power supply. It is a Center Positive power supply, indicating that the center (tip) of the output plug is positive (+), the outer barrel is negative (-).<br />
| [[File:Centre-positive.svg|thumb|120px|Center Positive 5V connector]]<br />
|}<br />
<br />
* North American Power Supply from Digikey - 5V@2.5A -[http://www.digikey.com/product-detail/en/EPSA050250U-P5P-EJ/T1058-P5P-ND/2235250 CUI EPSA050250U-P5P-EJ] <br />
* European Power Supply from Digikey - 5V@2.5A - [http://www.digikey.com/product-detail/en/EPSA050250UE-P5P-EJ/T1150-P5P-ND/2511851 CUI EPSA050250UE-P5P-EJ]<br />
* Powe Supply from Sparkfun - 5V@2A - [https://www.sparkfun.com/products/12889 TOL-12889]<br />
* Power Supply from Adafruit - 5V@2A - [http://www.adafruit.com/products/276 PRODUCT-ID:276]<br />
* Power Supply from SeeedStudio - 5V@2A [http://www.seeedstudio.com/depot/Wall-Adapter-Power-Supply-5VDC-2A-p-1508.html?cPath=1_4 SKU: POW06182B]<br />
<br />
==== 6-Wire Serial Console ====<br />
{|<br />
|- style="vertical-align:top;"<br />
| rowspan="2" | The serial console port uses a 3.3v FTDI serial cable with a 6-pin connector. This is a reasonably common cable, also used on the Arduino Pro, Arduino Pro Mini and Arduino Lilypad. <br/><br />
* '''Pin 1:''' Ground (GND) (Closest to SATA connector)<br />
* '''Pin 2:''' CTS<br />
* '''Pin 3:''' VCC (3.3V)<br />
* '''Pin 4:''' TXD<br />
* '''Pin 5:''' RXD<br />
* '''Pin 6:''' RTS<br />
<br />
<br/><br />
'''NOTE:''' The serial pinout is flipped between A0 and A1. A0 boards are rare, and are only being documented for completeness.<br/><br />
<br/><br />
Places that carry the appropriate Cable:<br />
* '''Mouser:''' [http://www.mouser.com/ProductDetail/FTDI/TTL-232R-3V3/?qs=sGAEpiMZZMuGxYVy11yKKo9Jh1vSyHd5j3BYkuIZ9TA%3d http://www.mouser.com/ProductDetail/FTDI/TTL-232R-3V3/?qs=sGAEpiMZZMuGxYVy11yKKo9Jh1vSyHd5j3BYkuIZ9TA%3d]<br />
* '''Digikey:''' [http://www.digikey.com/product-detail/en/TTL-232R-3V3/768-1015-ND/1836393 http://www.digikey.com/product-detail/en/TTL-232R-3V3/768-1015-ND/1836393]<br />
* '''Amazon:''' [http://www.amazon.com/GearMo%C2%AE-3-3v-Header-like-TTL-232R-3V3/dp/B004LBXO2A/ref=sr_1_2?ie=UTF8&qid=1400890304&sr=8-2&keywords=ftdi+3.3v http://www.amazon.com/GearMo%C2%AE-3-3v-Header-like-TTL-232R-3V3/dp/B004LBXO2A/ref=sr_1_2?ie=UTF8&qid=1400890304&sr=8-2&keywords=ftdi+3.3v] <br/> [http://www.amazon.com/3-3V-Debug-Cable-BeagleBone-Black/dp/B00FA7LD0Y/ref=sr_1_4?ie=UTF8&qid=1400890356&sr=8-4&keywords=ftdi+3.3v http://www.amazon.com/3-3V-Debug-Cable-BeagleBone-Black/dp/B00FA7LD0Y/ref=sr_1_4?ie=UTF8&qid=1400890356&sr=8-4&keywords=ftdi+3.3v]<br />
* '''Sparkfun:''' [https://www.sparkfun.com/products/9717 https://www.sparkfun.com/products/9717]<br />
<br/><br/><br />
* '''Baud rate:''' 115200<br />
* '''Hardware Flow Control:''' No<br />
* '''Bits:''' 8<br />
* '''Stop:''' 1<br />
<br />
| [[File:MinnowMax_-_Serial_Pinout_A1.png|thumb|400px|MinnowMax A1 Serial Pinout]]<br />
|}<br />
<br />
==== 4-Wire Serial Console ====<br />
{|<br />
|- style="vertical-align:top;"<br />
| rowspan="2" | The serial console port can uses a 3.3v FTDI serial cable with a 4-pin connector. This is a reasonably common cable, also used on the Arduino Pro, Arduino Pro Mini and Arduino Lilypad. If you are using one of the 4-wire adapters, here are the connections: <br/><br />
<br />
* '''Pin 1:BLACK''' - Ground (GND) (Closest to the SATA connector)<br />
* '''Pin 3:RED''' - VCC (Not connected)<br />
* '''Pin 4:GREEN''' - TXD<br />
* '''Pin 5:WHITE''' - RXD<br />
<br />
The RED wire is power and is internally not connected on the MinnowMax.<br />
<br />
Places that carry the appropriate Cable:<br />
* '''Adafruit''' [http://www.adafruit.com/products/954 http://www.adafruit.com/products/954]<br />
* '''Watterott ''' [http://www.watterott.com/de/Adafruit-USB-to-TTL-Serial-Cable http://www.watterott.com/de/Adafruit-USB-to-TTL-Serial-Cable]<br />
<br />
<br/><br/><br />
* '''Baud rate:''' 115200<br />
* '''Hardware Flow Control:''' No<br />
* '''Bits:''' 8<br />
* '''Stop:''' 1<br />
<br />
| [[File:MinnowMax_-_Serial_Pinout_A1.png|thumb|400px|MinnowMax A1 Serial Pinout]]<br />
|}<br />
<br />
==== D1 (LED) ====<br />
<br />
This is the power indicator, when lit power is being supplied to the board<br />
<br />
==== D2 (LED) ====<br />
<br />
This is the On/Off status indicator. When lit the system is running.<br />
<br />
==== HDMI ====<br />
<br />
The MinnowMax uses a Type D micro-HDMI connector. This is a standard port, for which cables and adapters can be readily picked up from most electronics stores<br />
<br />
==== Ethernet ====<br />
<br />
The MinnowMax uses a Realtek RTL8111GS-CG PCIe based chipset to provide 10/100/1000 ethernet connection. the results of some performance tests using iperf are available [[MinnowBoard:MinnowMax_Iperf_log|HERE]].<br />
<br />
==== Low Speed Expansion (Top) ====<br />
The low speed connector uses 0.1" (2.54 mm) Male header pins in a 2 x 13 array, for a total of 26 pins. Pin 1 is the in the row closest to the power connector, and closest to the board edge.<br />
<br><br />
<br><br />
'''NOTE:''' All I/O on the Low Speed Expansion is at 3.3V levels<br />
<br><br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="20%" | Description<br />
! width="20%" | Name<br />
! width="5%" | Pin<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Pin<br />
! width="20%" | Name<br />
! width="20%" | Description<br />
|-<br />
| Ground<br />
| Gnd<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| colspan=2 |<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Gnd<br />
| Ground<br />
|-<br />
| +5V Power<br />
| VCC<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 3 <br />
| colspan=2 |<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 4<br />
| +3V3<br />
| + 3.3V Power<br />
|-<br />
| SPI Chip Select 1<br />
| GPIO_SPI_CS#<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 5<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 220<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 225<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 6<br />
| GPIO_UART1_TXD<br />
| UART Transmit<br />
|-<br />
| Master In / Slave Out<br />
| GPIO_SPI_MISO<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 7<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 221 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 224<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 8<br />
| GPIO_UART1_RXD<br />
| UART Receive<br />
|-<br />
| Master Out / Slave In<br />
| GPIO_SPI_MOSI<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 9<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 222<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 227<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 10<br />
| GPIO_UART1_CTS<br />
| CTS / GPIO<br />
|-<br />
| SPI Clock<br />
| GPIO_SPI_CLK<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 11<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 223<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 226<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 12<br />
| GPIO_UART1_RTS<br />
| RTS / GPIO<br />
|-<br />
| Clock / GPIO<br />
| GPIO_I2C_SCL (I2C #5)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 13 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 243<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 216<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 14<br />
| GPIO_I2S_CLK<br />
| Clock / GPIO<br />
|-<br />
| Data / GPIO<br />
| GPIO_I2C_SDA (I2C #5)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 15 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 242<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 217<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 16<br />
| GPIO_I2S_FRM<br />
| Frame / GPIO<br />
|-<br />
| UART Transmit / GPIO<br />
| GPIO_UART2_TXD<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 17 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 229<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 219<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 18<br />
| GPIO_I2S_DO<br />
| Data Out / GPIO<br />
|-<br />
| UART Receive / GPIO<br />
| GPIO_UART2_RXD<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 19 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 228<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 218<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 20<br />
| GPIO_I2S_DI<br />
| Data In / GPIO<br />
|-<br />
| GPIO / Wakeup<br />
| GPIO_S5_0<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 21 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 82<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 248<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 22<br />
| GPIO_PWM0<br />
| PWM / GPIO<br />
|-<br />
| GPIO / Wakeup<br />
| GPIO_S5_1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 23 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 83<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 249<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 24<br />
| GPIO_PWM1<br />
| PWM / GPIO<br />
|-<br />
| GPIO / Wakeup<br />
| GPIO_S5_4<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 25 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 84<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 208<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 26<br />
| GPIO_IBL_8254<br />
| Timer / GPIO<br />
|}<br />
<br />
'''NOTE:''' Pins 5-26 are shown above with their '''PRIMARY''' configuration, any pin may be switched to being a generic GPIO as well. This would give a total of 22 GPIOs, with two of those being PWM capable.<br />
<br />
{|<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have issues with firmware prior to 0.71 (8/13/2014 build)<br />
|-<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have been tested and work as expected. Remember to drive the pin to ground.<br />
|-<br />
|}<br />
<br />
==== High Speed Expansion (Bottom) ====<br />
The High speed connector uses a TE Connectivity compatible 60-pin header. The generally recommended header is the 3-5177986-2, or the 60POS .8MM FH 8H GOLD part that rises 7.85mm, allowing for 3/8" standoffs at the corners to be used to attach the lure to the minnowboard.<br />
<br />
Link to connector used: [http://www.digikey.com/product-detail/en/5177985-2/A99190CT-ND/1894007 http://www.digikey.com/product-detail/en/5177985-2/A99190CT-ND/1894007]. mating connectors are listed at the bottom but include:<br />
<br />
* '''A99196DKR-ND''' - CONN PLUG 60POS .8MM FH 5H GOLD<br />
* '''A115336-ND''' - CONN PLUG 60POS DL BRD/BRD VERT<br />
* '''5179030-2-ND''' - CONN PLUG 60POS FH .8MM BRD-BRD<br />
* '''5177984-2-ND''' - CONN PLUG 60POS VERT FH .8MM<br />
* '''[http://www.digikey.com/product-detail/en/3-5177986-2/A99215CT-ND/1894032 A99215CT-ND]''' - CONN PLUG 60POS .8MM FH 8H GOLD &nbsp;&nbsp;'''<-- Recommended connector<br />
* '''A99209CT-ND''' - CONN PLUG 60POS .8MM FH 7H GOLD<br />
* '''A99203CT-ND''' - CONN PLUG 60POS .8MM FH 6H GOLD<br />
* '''A99196CT-ND''' - CONN PLUG 60POS .8MM FH 5H GOLD<br />
* '''A99215TR-ND''' - CONN PLUG 60POS .8MM FH 8H GOLD<br />
* '''A99209TR-ND''' - CONN PLUG 60POS .8MM FH 7H GOLD<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Ground<br />
|-<br />
| mSATA_TX_P<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 3<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 4<br />
| mSATA_RX_P<br />
|-<br />
| mSATA_TX_N<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 5<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 6<br />
| mSATA_RX_N<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 7<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 8<br />
| +5V SB<br />
|-<br />
| mPCIE_REFCLK_P<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 9<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 10<br />
| USB_HOST_DP<br />
|-<br />
| mPCIE_REFCLK_N<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 11<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 12<br />
| USB_HOST_DN<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 13<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 14<br />
| Ground<br />
|-<br />
| mPCIE_TX_P<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 15<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 16<br />
| mPCIE_RX_P<br />
|-<br />
| mPCIE_TX_N<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 17<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 18<br />
| mPCIE_RX_N<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 19<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 20<br />
| +5V SB<br />
|-<br />
| EXP_I2C_SCL (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 21<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 22<br />
| mPCIE_WAKEB<br />
|-<br />
| EXP_I2C_SDA (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 23<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 24<br />
| mPCIe_CLKREQ3_B<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 25<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 26<br />
| Ground<br />
|-<br />
| EXP_GPIO1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 27<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 28<br />
| EXP_GPIO3<br />
|-<br />
| EXP_GPIO2<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 29<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 30<br />
| EXP_GPIO4<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 31<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 32<br />
| +5V SB<br />
|-<br />
| EXP_GPIO6 (XDP_H_OBSDATA_A1)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 33<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 34<br />
| EXP_GPIO5 (XDP_H_OBSDATA_A0)<br />
|-<br />
| EXP_GPIO7 (XDP_H_OBSDATA_A2)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 35<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 36<br />
| EXP_GPIO8 (XDP_H_OBSDATA_A3)<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 37<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 38<br />
| Ground<br />
|-<br />
| XDP_H_PRDYB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 39<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 40<br />
| XDP_H_PREQB_PB<br />
|-<br />
| PMC_RSMRST<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 41<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 42<br />
| FP_PWRBTN<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 43<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 44<br />
| +5V SB<br />
|-<br />
| PMC_CORE_PWROK<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 45<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 46<br />
| PMC_RSTBTN<br />
|-<br />
| PMC_PLTRST_R_V1P8<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 47<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 48<br />
| ILB_RTC_TESTB<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 49<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 50<br />
| Ground<br />
|-<br />
| <br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 51<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 52<br />
| XDP_H_TRSTB<br />
|-<br />
| <br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 53<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 54<br />
| XDP_H_TCK<br />
|-<br />
| +V1P8A<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 55<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 56<br />
| XDP_H_TMS<br />
|-<br />
| +V1P8A<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 57<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 58<br />
| XDP_H_TDI<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 59<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 60<br />
| Ground<br />
|}<br />
<br />
===== GPIO Mapping =====<br />
<br />
{| width="85%" style="text-align:center;"<br />
! width="20%" | Name<br />
! width="5%" | Pin<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Pin<br />
! width="20%" | Name<br />
|-<br />
| EXP_I2C_SCL (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 21<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 245<br />
|-<br />
| EXP_I2C_SDA (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 23<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 244<br />
|-<br />
| colspan="6" | [...]<br />
|-<br />
| EXP_GPIO1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 27<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 109<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 111<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 28<br />
| EXP_GPIO3<br />
|-<br />
| EXP_GPIO2<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 29<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 110<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 112<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 30<br />
| EXP_GPIO4<br />
|-<br />
| colspan="6" | [...]<br />
|-<br />
| EXP_GPIO6<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 33<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 105<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 106<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 34<br />
| EXP_GPIO5<br />
|-<br />
| EXP_GPIO7<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 35<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 107<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 108<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 36<br />
| EXP_GPIO8<br />
|-<br />
|}<br />
<br />
'''NOTE:''' The I2C pins have the same property as the pins in the Low Speed Expansion Header, in that their primary purpose is I2C, but can be switched to GPIO in the firmware. In firmware this is the I2C #6<br />
<br />
{|<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have issues with firmware prior to 0.71 (8/13/2014 build)<br />
|-<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have been tested and work as expected. Remember to drive the pin to ground.<br />
|-<br />
|}<br />
<br />
==== SPI Header to Firmware flashing J1 ====<br />
This is a pinned out port to allow for external flashing of the boot spi. Dediprog and Flyswatter devices have been tested and verified to work with this.<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| DDP_1V8<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Ground<br />
|-<br />
| DDP_SPI_CS<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 3<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 4<br />
| DDP_SPI_CLK<br />
|-<br />
| DDP_SPI_MISO<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 5<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 6<br />
| DDP_SPI_MOSI<br />
|-<br />
| <br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 7<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 8<br />
| DDP_IO3L<br />
|}<br />
<br />
==== Power Connection J2 (SIP2_FAN) ====<br />
This is a 5V 2-pin pin out originally intended to be used for a CPU fan. The single core (E3815) and the dual core (E3825) however use passive heat sinks, and thus do not, under normal circumstances, need a fan. It is theoretically possible to pull upwards of 1A through this port, however you should refer to the released schematics to verify that number before attempting to use this for anything.<br />
<br />
'''NOTE:''' This is not populated on the Single, or Dual core boards. This can be populated if needed, and will provide the above power<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| +5VSB<br />
|}<br />
<br />
==== Switch Jumper J5 ====<br />
This pin is intended to allow for power toggling via a remote switch or relay. It is fundamentally no different than pressing SW1, and behaves identically.<br />
<br />
'''NOTE:''' This is not populated, by default.<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| +5VSB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Ground<br />
|}<br />
<br />
==== SATA LED J6 ====<br />
J6 header is allows for an external LED to be connected to the SATA interface's activity signal. when a LED is connected to this header it will blink based on the amount of SATA read/write activity.<br />
<br />
'''NOTE:''' This is not populated, by default.<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
|<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| +V1P8S<br />
|}<br />
<br />
==== SD Card Write Protect J7 ====<br />
<br />
This is a jumper point, mostly available for debugging, that enables the sd card write protect explictily. This is not populated on production boards.<br />
=== Design Files ===<br />
<br />
'''NOTE: All design files are released under Creative Commons CC-BY-SA (http://creativecommons.org/)'''<br />
<br />
The MinnowBoard Max is intended to comply with all requirements and guidelines set forth by the Open Source Hardware Association (http://www.oshwa.org/)<br />
<br />
<br><br />
* [[media:MinnowMax_RevA1_sch.pdf|Schematic (PDF)]]<br />
* [[media:MinnowMax_RevA1_dsn.zip|Schematic (Orcad DSN)]]<br />
* [[media:MinnowMax_RevA1_brd.zip|Board Layout (Allegro BRD)]]<br />
* [[media:MinnowMax_RevA1_mfg.zip|Gerbers]]<br />
* [[media:MinnowMax_RevA1_bom.zip|Bill of Materials]]<br />
<br><br />
<br><br />
<br />
=== Known Issues ===<br />
----<br />
==== MinnowBoard-MAX Open Bugs (Bugzilla) ====<br />
<br />
* Bugzilla:<br/> We currently use the YoctoProject Bugzilla instance at [http://bugzilla.yoctoproject.org http://bugzilla.yoctoproject.org]<br />
* Bug Triage link can be found at: [https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage]<br />
<br />
==== A1 ====<br />
----<br />
===== Hardware =====<br />
----<br />
====== USB ======<br />
There is a potential issue when using a powered USB Hub. If the hub, erroneously, provides power over the USB 3 or USB 2 input connector, the MinnowBoard MAX will use that as power. This is in violation of the USB spec, and will be rectified in a later revision of the MinnowBoard MAX.<br />
<br />
Hubs known to cause this:<br />
* iXCC 7 Port USB 3.0 Hub<br />
** [http://www.amazon.com/iXCC-Firmware-backwards-compatibility-External/dp/B00GLJIPK6/ref=sr_1_2?ie=UTF8&qid=1403830109&sr=8-2&keywords=ixcc+usb3+powered+hub Amazon Link]<br />
** [http://ixcc.com/ iXCC Website]<br />
<br />
It is suggested that you check powered USB hubs to confirm that they do not provide power back to the board, as described, and if a hub is found to do this, please report it here. A hub found to be doing this should be used without being externally powered if used at all.<br />
<br />
===== Firmware =====<br />
----<br />
See the bug list, linked above.<br />
<br />
----<br />
<br />
There are some reports of corruption of the UEFI firmware<br />
<br />
Symptoms are no display, 2 leds on, and this [[serial]] output trace :<br />
<br />
<pre><br />
>>>>SecStartup<br />
>>>>MemoryInit Done<br />
>>>>BdsEntry<br />
</pre><br />
<br />
<br />
Hints :<br />
<br />
* https://dockr.eurogiciel.fr/blogs/embedded/tizen-minnowboard-max<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140721/000203.html<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140804/000236.html<br />
* http://irc.minnowboard.org/%23minnowboard.2014-08-07.log.html<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140811/000309.html# Important - Firmware Update<br />
* https://bugzilla.yoctoproject.org/show_bug.cgi?id=6585#c26<br />
<br />
<br />
Resources : <br />
<br />
* http://www.elinux.org/Minnowboard:SPI_Boot_flash : said to apply to Max<br />
* http://www.elinux.org/Minnowboard:Hardware_Revisions<br />
* [https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage MinnowBoard Bugs]<br />
<br />
'''This should be resolved in firmware's after 8/13/2014'''<br />
<br />
<br />
<br />
===== Unknown =====<br />
----<br />
====== Monitors ======<br />
<br />
There is an issue with regards to some monitors not being able to display from the MinnowBoard MAX. Most monitors seem to be fine, but some will either completely not show a display (even at firmware boot-up) or may only show a display after the operating system is booting.<br />
<br />
This turns out to be an issue with regards to HDMI vs. DVI detection and initialization. A work around is being added into the firmware to resolve this.<br />
<br />
'''This is fixed in firmware's after 8/13/2014'''</div>Dvharthttps://elinux.org/index.php?title=File:Minnowmax-3.18.txt&diff=355658File:Minnowmax-3.18.txt2014-10-26T01:52:14Z<p>Dvhart: Dvhart uploaded a new version of File:Minnowmax-3.18.txt</p>
<hr />
<div>Linux kernel configuration fragment enabling MinnowBoard MAX features in addition to the x86_64 defconfig.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxLinuxKernel&diff=355652Minnowboard:MinnowMaxLinuxKernel2014-10-26T01:45:14Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard MAX has had mainline ([http://kernel.org Kernel.org]) Linux kernel support since 3.14, with some caveats. If using 3.14, you will want use the ACPI enumeration mode for the LPSS devices. If you want to use PCI enumeration, there are some needed PCI fixes for SPI that landed in the 3.16 kernel. Additional improvements to DRM and other areas are still making their way upstream. 3.18 is looking to be solid version for Bay Trail SoC support, including the Intel Atom E38** SoCs found on the MinnowBoard MAX.<br />
<br />
While the x86_64 defconfig will boot the MinnowBoard MAX, you will likely want to enable various busses and IO devices to make the most of the board. The following configuration fragment is a good starting point:<br />
<br />
[[File:Minnowmax-3.18.txt]]<br />
<br />
To use it, you'll need to combine it with the x86_64 defconfig. If building on an x86_64 host, perform the following:<br />
<br />
$ cd /path/to/linux<br />
$ make defconfig<br />
$ wget http://www.elinux.org/images/e/e2/Minnowmax-3.18.txt<br />
$ scripts/kconfig/merge_config.sh .config minnowboardmax-3.18.cfg<br />
<if all you see are overrides converting Y to M or similar, everything went according to plan><br />
$ make -j4 && make -j4 modules<br />
<br />
Then install the kernel and modules according to your environment.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxLinuxKernel&diff=355646Minnowboard:MinnowMaxLinuxKernel2014-10-26T01:44:01Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard MAX has had mainline (kernel.org) Linux kernel support since 3.14, with some caveats. If using 3.14, you'll want use the ACPI enumeration mode for the LPSS devices. If you want to use PCI enumeration, there are some needed PCI fixes for SPI that landed in the 3.16 kernel. Additional improvements to DRM and other areas are still making their way upstream. 3.18 is looking to be solid version for Bay Trail SoC support, including the Intel Atom E38** SoCs found on the MinnowBoard MAX.<br />
<br />
While the x86_64 defconfig will boot the MinnowBoard MAX, you will likely want to enable various busses and IO devices to make the most of the board. The following configuration fragment is a good starting point:<br />
<br />
[[File:Minnowmax-3.18.txt]]<br />
<br />
To use it, you'll need to combine it with the x86_64 defconfig. If building on an x86_64 host, perform the following:<br />
<br />
$ cd /path/to/linux<br />
$ make defconfig<br />
$ wget http://www.elinux.org/images/e/e2/Minnowmax-3.18.txt<br />
$ scripts/kconfig/merge_config.sh .config minnowboardmax-3.18.cfg<br />
<if all you see are overrides converting Y to M or similar, everything went according to plan><br />
$ make -j4 && make -j4 modules<br />
<br />
Then install the kernel and modules according to your environment.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxLinuxKernel&diff=355640Minnowboard:MinnowMaxLinuxKernel2014-10-26T01:43:16Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard MAX has had mainline (kernel.org) Linux kernel support since 3.14, with some caveats. If using 3.14, you'll want use the ACPI enumeration mode for the LPSS devices. If you want to use PCI enumeration, there are some needed PCI fixes for SPI that landed in the 3.16 kernel. Additional improvements to DRM and other areas are still making their way upstream. 3.18 is looking to be solid version for Bay Trail SoC support, including the Intel Atom E38** SoCs found on the MinnowBoard MAX.<br />
<br />
While the x86_64 defconfig will boot the MinnowBoard MAX, you will likely want to enable various busses and IO devices to make the most of the board. The following configuration fragment is a good starting point:<br />
<br />
[[File:Minnowmax-3.18.txt]]<br />
<br />
To use it, you'll need to combine it with the x86_64 defconfig. If building on an x86_64 host, perform the following:<br />
<br />
$ cd /path/to/linux<br />
$ make defconfig<br />
$ wget http://www.elinux.org/images/e/e2/Minnowmax-3.18.txt<br />
$ scripts/kconfig/merge_config.sh .config minnowboardmax-3.18.cfg<br />
<if all you see are overrides converting Y to M or similar, everything went according to plan><br />
$ make -j4 && make -j4 modules<br />
<br />
Then install the kernel and modules according to your environment.</div>Dvharthttps://elinux.org/index.php?title=File:Minnowmax-3.18.txt&diff=355634File:Minnowmax-3.18.txt2014-10-26T01:40:56Z<p>Dvhart: Linux kernel configuration fragment enabling MinnowBoard MAX features in addition to the x86_64 defconfig.</p>
<hr />
<div>Linux kernel configuration fragment enabling MinnowBoard MAX features in addition to the x86_64 defconfig.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxLinuxKernel&diff=355628Minnowboard:MinnowMaxLinuxKernel2014-10-26T01:38:07Z<p>Dvhart: Created page with "The MinnowBoard MAX has had mainline (kernel.org) Linux kernel support since 3.14, with some caveats. If using 3.14, you'll want use the ACPI enumeration mode for the LPSS dev..."</p>
<hr />
<div>The MinnowBoard MAX has had mainline (kernel.org) Linux kernel support since 3.14, with some caveats. If using 3.14, you'll want use the ACPI enumeration mode for the LPSS devices. If you want to use PCI enumeration, there are some needed PCI fixes for SPI that landed in the 3.16 kernel. Additional improvements to DRM and other areas are still making their way upstream. 3.18 is looking to be solid version for Bay Trail SoC support, including the Intel Atom E38** SoCs found on the MinnowBoard MAX.<br />
<br />
While the x86_64 defconfig will boot the MinnowBoard MAX, you will likely want to enable various busses and IO devices to make the most of the board. The following configuration fragment is a good starting point. To use it, you'll need to combine it with the x86_64 defconfig. If building on an x86_64 host, perform the following:<br />
<br />
$ cd /path/to/linux<br />
$ make defconfig<br />
$ wget <minnowboardmax-3.18.cfg><br />
$ scripts/kconfig/merge-config.sh .config minnowboardmax-3.18.cfg<br />
<if all you see are overrides converting Y to M or similar, everything went according to plan><br />
$ make -j4 && make -j4 modules<br />
<br />
Then install the kernel and modules according to your environment.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMax&diff=354650Minnowboard:MinnowMax2014-10-21T19:32:16Z<p>Dvhart: </p>
<hr />
<div>[[File:Minnowboard.org.png|center|800px]]<br />
<br />
{| class="wikitable" style="float: right;font-size: 75%;" width="25%"<br />
! Category || Feature<br />
|-<br />
! rowspan="2" | Core Logic<br />
|<br />
* 64-bit Intel® Atom™ E38xx Series SoC<br />
** $99 MSRP: E3815 (single-core, 1.46 GHz)<br />
** $139 MSRP: E3825 (dual-core, 1.33 GHz)<br />
[[Minnowboard:MinnowMaxCPU|CPU Information]] <br />
|-<br />
| Integrated Intel® HD Graphics With Open Source hardware-accelerated drivers for Linux OS<br />
|-<br />
! rowspan="2" | Memory<br />
|<br />
* DDR3 RAM<br/>System Memory<br />
** $99 MSRP: 1 GB<br />
** $139 MSRP: 2 GB<br />
|-<br />
| 8 MB SPI Flash <br/> System Firmware Memory<br />
|-<br />
! Video<br />
| Intel® HD Graphics <br/><br />
HDMI (micro HDMI connector) <br/><br />
1920x1080 max resolution <br/><br />
HDMI 1.4a<br />
|-<br />
! rowspan="2" | Audio<br />
| Digital <br/><br />
via HDMI<br />
|-<br />
| Analog <br/><br />
To be available separately via MinnowBoard MAX Lure (sold separately)<br />
|-<br />
! rowspan="6" | I/O<br />
| 1 – Micro SDSDIO<br />
|-<br />
| 1 – SATA2 3Gb/sec<br/>(Port multipliers not supported via on-board SATA)<br />
|-<br />
| 1 – USB 3.0 (host)<br />
|-<br />
| 1 – USB 2.0 (host)<br />
|-<br />
| 1 – Serial debug <br/><br />
via FTDI cable (sold separately)<br />
|-<br />
| 10/100/1000 Ethernet <br/><br />
RJ-45 connector<br />
|-<br />
! rowspan="3" | Experimenter<br/>Features<br />
| 8 – Buffered GPIO pins 2 pins support PWM<br />
|-<br />
| I2C & SPI bus <br />
|-<br />
| System Firmware Flash<br/><br />
Programming Header <br/><br />
Compatible with Dedi-Prog programmer<br />
|-<br />
! Board Dimensions<br />
| 99 x 74mm (2.9 x 3.9in)<br />
|-<br />
! Temperature Range<br />
| 0 – 70 deg C <br/><br />
Contact CirtcuitCo for industrial temp range needs<br />
|-<br />
! Power<br />
| 5V DC <br/><br />
Sold separately in configurations appropriate to your region<br />
|-<br />
! Operating Systems<br />
|<br />
* '''Supported:'''<br />
** Debian GNU/Linux<br />
** [[Minnowboard:MinnowMaxYoctoProject|Yocto Project Compatible]]<br />
** Android 4.4 System<br />
** [http://www.msdn.microsoft.com/hardwaredevboard Windows 8.1]<br />
* '''Unsupported <br/> (but known to work):'''<br />
** Fedora<br />
** CentOS<br />
** Linux Mint<br />
<br />
[[Minnowboard:MinnowMaxDistros|Setting up / Installing Linux]]<br />
|-<br />
!rowspan="2" | System Boot Firmware<br />
| UEFI Firmware<br />
|-<br />
| Coreboot (in development)<br />
|-<br />
|colspan="2"|'''Note:''' These features may be subject to change without notice. Hardware design files will be made available shortly after the board enters final production. Current estimate of public availability is '''June 2014'''.<br />
|-<br />
|}<br />
<br />
[[File:MinnowBoard_MAX-Top-Angled.jpg|510px|MinnowBoard MAX]]<br />
<br />
=== Resources ===<br />
----<br />
{| width="60%"<br />
|-<br />
| width="50%" style="vertical-align: top;" |<br />
* [[Minnowboard:MaxBoot|Booting the MinnowBoard MAX]]<br />
* [[Minnowboard:MaxBios|Getting to the Bios]]<br />
* [[Minnowboard:MaxLPSSSetup|Setting GPIO pin mux states]]<br />
| width="50%" style="vertical-align: top;" |<br />
* [http://www.minnowboard.org MinnowBoard Project Page]<br />
* [http://www.intel.com/content/www/us/en/intelligent-systems/bay-trail/atom-processor-e3800-family-overview.html Intel Atom E38xx Pages]<br />
* [[Minnowboard:FAQ|MinnowBoard FAQ]]<br />
* [[Minnowboard:Hardware_Revisions|MinnowBoard Hardware Revisions]]<br />
* [[Minnowboard:MinnowMaxDistros|Setting up / Installing Linux for the Minnowboard MAX]]<br />
* [[Minnowboard:MinnowMaxYoctoProject|Using the Yocto Project with the Minnowboard MAX]]<br />
|}<br />
<br><br />
<br><br />
<br />
==== Firmware ====<br />
<br />
* UEFI (Intel)<br />
** [https://uefidk.com/content/minnowboard-max https://uefidk.com/content/minnowboard-max]<br />
* Coreboot<br />
** [http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=e6df041b8bf8e37debc0d6a871080b64eea7a372 http://review.coreboot.org/gitweb?p=coreboot.git;a=commit;h=e6df041b8bf8e37debc0d6a871080b64eea7a372]]<br />
<br />
==== Cases ====<br />
<br />
* Half cases<br />
** John 'Warthog9' Hawley's<br />
*** [https://github.com/warthog9/minnowboardmax-case https://github.com/warthog9/minnowboardmax-case]<br />
*** [http://www.thingiverse.com/thing:389100 http://www.thingiverse.com/thing:389100]<br />
*** [http://www.shapeways.com/model/2205839/minnowboard-max-half-case.html?li=search-results&materialId=99 http://www.shapeways.com/model/2205839/minnowboard-max-half-case.html?li=search-results&materialId=99]<br />
*** https://www.youtube.com/watch?v=WKLuHodiSfc<br />
<br />
=== Accessories (Lures) ===<br />
* Information on Lures can be found on the [[MinnowBoard:MaxLures|MinnowBoard MAX Lure wiki page]]<br />
<br><br />
<br><br />
<br />
=== Hardware Notes ===<br />
----<br />
==== Board Layout ====<br />
[[File:MinnowBoardMAX-board-layout1.png|700px|MinnowBoard MAX Board Layout 1]]<br/><br />
[[File:MinnowBoardMAX-board-layout2.png|700px|MinnowBoard MAX Board Layout 2]]<br/><br />
[[File:MinnowBoardMAX-board-layout3.png|700px|MinnowBoard MAX Board Layout 3]]<br/><br />
==== Power Plug ====<br />
<br />
{|<br />
|- style="vertical-align:top;"<br />
|The Minnowboard Max uses a 5.5 x 2.1mm barrel 5V power plug, and if bundled will ship with a 2.5A power supply. It is a Center Positive power supply, indicating that the center (tip) of the output plug is positive (+), the outer barrel is negative (-).<br />
| [[File:Centre-positive.svg|thumb|120px|Center Positive 5V connector]]<br />
|}<br />
<br />
* North American Power Supply from Digikey - 5V@2.5A -[http://www.digikey.com/product-detail/en/EPSA050250U-P5P-EJ/T1058-P5P-ND/2235250 CUI EPSA050250U-P5P-EJ] <br />
* European Power Supply from Digikey - 5V@2.5A - [http://www.digikey.com/product-detail/en/EPSA050250UE-P5P-EJ/T1150-P5P-ND/2511851 CUI EPSA050250UE-P5P-EJ]<br />
* Powe Supply from Sparkfun - 5V@2A - [https://www.sparkfun.com/products/12889 TOL-12889]<br />
* Power Supply from Adafruit - 5V@2A - [http://www.adafruit.com/products/276 PRODUCT-ID:276]<br />
* Power Supply from SeeedStudio - 5V@2A [http://www.seeedstudio.com/depot/Wall-Adapter-Power-Supply-5VDC-2A-p-1508.html?cPath=1_4 SKU: POW06182B]<br />
<br />
==== 6-Wire Serial Console ====<br />
{|<br />
|- style="vertical-align:top;"<br />
| rowspan="2" | The serial console port uses a 3.3v FTDI serial cable with a 6-pin connector. This is a reasonably common cable, also used on the Arduino Pro, Arduino Pro Mini and Arduino Lilypad. <br/><br />
* '''Pin 1:''' Ground (GND) (Closest to SATA connector)<br />
* '''Pin 2:''' CTS<br />
* '''Pin 3:''' VCC (3.3V)<br />
* '''Pin 4:''' TXD<br />
* '''Pin 5:''' RXD<br />
* '''Pin 6:''' RTS<br />
<br />
<br/><br />
'''NOTE:''' The serial pinout is flipped between A0 and A1. A0 boards are rare, and are only being documented for completeness.<br/><br />
<br/><br />
Places that carry the appropriate Cable:<br />
* '''Mouser:''' [http://www.mouser.com/ProductDetail/FTDI/TTL-232R-3V3/?qs=sGAEpiMZZMuGxYVy11yKKo9Jh1vSyHd5j3BYkuIZ9TA%3d http://www.mouser.com/ProductDetail/FTDI/TTL-232R-3V3/?qs=sGAEpiMZZMuGxYVy11yKKo9Jh1vSyHd5j3BYkuIZ9TA%3d]<br />
* '''Digikey:''' [http://www.digikey.com/product-detail/en/TTL-232R-3V3/768-1015-ND/1836393 http://www.digikey.com/product-detail/en/TTL-232R-3V3/768-1015-ND/1836393]<br />
* '''Amazon:''' [http://www.amazon.com/GearMo%C2%AE-3-3v-Header-like-TTL-232R-3V3/dp/B004LBXO2A/ref=sr_1_2?ie=UTF8&qid=1400890304&sr=8-2&keywords=ftdi+3.3v http://www.amazon.com/GearMo%C2%AE-3-3v-Header-like-TTL-232R-3V3/dp/B004LBXO2A/ref=sr_1_2?ie=UTF8&qid=1400890304&sr=8-2&keywords=ftdi+3.3v] <br/> [http://www.amazon.com/3-3V-Debug-Cable-BeagleBone-Black/dp/B00FA7LD0Y/ref=sr_1_4?ie=UTF8&qid=1400890356&sr=8-4&keywords=ftdi+3.3v http://www.amazon.com/3-3V-Debug-Cable-BeagleBone-Black/dp/B00FA7LD0Y/ref=sr_1_4?ie=UTF8&qid=1400890356&sr=8-4&keywords=ftdi+3.3v]<br />
* '''Sparkfun:''' [https://www.sparkfun.com/products/9717 https://www.sparkfun.com/products/9717]<br />
<br/><br/><br />
* '''Baud rate:''' 115200<br />
* '''Hardware Flow Control:''' No<br />
* '''Bits:''' 8<br />
* '''Stop:''' 1<br />
<br />
| [[File:MinnowMax_-_Serial_Pinout_A1.png|thumb|400px|MinnowMax A1 Serial Pinout]]<br />
|}<br />
<br />
==== 4-Wire Serial Console ====<br />
{|<br />
|- style="vertical-align:top;"<br />
| rowspan="2" | The serial console port can uses a 3.3v FTDI serial cable with a 4-pin connector. This is a reasonably common cable, also used on the Arduino Pro, Arduino Pro Mini and Arduino Lilypad. If you are using one of the 4-wire adapters, here are the connections: <br/><br />
<br />
* '''Pin 1:BLACK''' - Ground (GND) (Closest to the SATA connector)<br />
* '''Pin 3:RED''' - VCC (Not connected)<br />
* '''Pin 4:GREEN''' - TXD<br />
* '''Pin 5:WHITE''' - RXD<br />
<br />
The RED wire is power and is internally not connected on the MinnowMax.<br />
<br />
Places that carry the appropriate Cable:<br />
* '''Adafruit''' [http://www.adafruit.com/products/954 http://www.adafruit.com/products/954]<br />
* '''Watterott ''' [http://www.watterott.com/de/Adafruit-USB-to-TTL-Serial-Cable http://www.watterott.com/de/Adafruit-USB-to-TTL-Serial-Cable]<br />
<br />
<br/><br/><br />
* '''Baud rate:''' 115200<br />
* '''Hardware Flow Control:''' No<br />
* '''Bits:''' 8<br />
* '''Stop:''' 1<br />
<br />
| [[File:MinnowMax_-_Serial_Pinout_A1.png|thumb|400px|MinnowMax A1 Serial Pinout]]<br />
|}<br />
<br />
==== D1 (LED) ====<br />
<br />
This is the power indicator, when lit power is being supplied to the board<br />
<br />
==== D2 (LED) ====<br />
<br />
This is the On/Off status indicator. When lit the system is running.<br />
<br />
==== HDMI ====<br />
<br />
The MinnowMax uses a Type D micro-HDMI connector. This is a standard port, for which cables and adapters can be readily picked up from most electronics stores<br />
<br />
==== Ethernet ====<br />
<br />
The MinnowMax uses a Realtek RTL8111GS-CG PCIe based chipset to provide 10/100/1000 ethernet connection. the results of some performance tests using iperf are available [[MinnowBoard:MinnowMax_Iperf_log|HERE]].<br />
<br />
==== Low Speed Expansion (Top) ====<br />
The low speed connector uses 0.1" (2.54 mm) Male header pins in a 2 x 13 array, for a total of 26 pins. Pin 1 is the in the row closest to the power connector, and closest to the board edge.<br />
<br><br />
<br><br />
'''NOTE:''' All I/O on the Low Speed Expansion is at 3.3V levels<br />
<br><br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="20%" | Description<br />
! width="20%" | Name<br />
! width="5%" | Pin<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Pin<br />
! width="20%" | Name<br />
! width="20%" | Description<br />
|-<br />
| Ground<br />
| Gnd<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| colspan=2 |<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Gnd<br />
| Ground<br />
|-<br />
| +5V Power<br />
| VCC<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 3 <br />
| colspan=2 |<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 4<br />
| +3V3<br />
| + 3.3V Power<br />
|-<br />
| SPI Chip Select 1<br />
| GPIO_SPI_CS#<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 5<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 220<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 225<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 6<br />
| GPIO_UART1_TXD<br />
| UART Transmit<br />
|-<br />
| Master In / Slave Out<br />
| GPIO_SPI_MISO<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 7<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 221 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 224<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 8<br />
| GPIO_UART1_RXD<br />
| UART Receive<br />
|-<br />
| Master Out / Slave In<br />
| GPIO_SPI_MOSI<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 9<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 222<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 227<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 10<br />
| GPIO_UART1_CTS<br />
| CTS / GPIO<br />
|-<br />
| SPI Clock<br />
| GPIO_SPI_CLK<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 11<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 223<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 226<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 12<br />
| GPIO_UART1_RTS<br />
| RTS / GPIO<br />
|-<br />
| Clock / GPIO<br />
| GPIO_I2C_SCL (I2C #5)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 13 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 243<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 216<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 14<br />
| GPIO_I2S_CLK<br />
| Clock / GPIO<br />
|-<br />
| Data / GPIO<br />
| GPIO_I2C_SDA (I2C #5)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 15 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 242<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 217<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 16<br />
| GPIO_I2S_FRM<br />
| Frame / GPIO<br />
|-<br />
| UART Transmit / GPIO<br />
| GPIO_UART2_TXD<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 17 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 229<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 219<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 18<br />
| GPIO_I2S_DO<br />
| Data Out / GPIO<br />
|-<br />
| UART Receive / GPIO<br />
| GPIO_UART2_RXD<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 19 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 228<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 218<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 20<br />
| GPIO_I2S_DI<br />
| Data In / GPIO<br />
|-<br />
| GPIO / Wakeup<br />
| GPIO_S5_0<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 21 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 82<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 248<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 22<br />
| GPIO_PWM0<br />
| PWM / GPIO<br />
|-<br />
| GPIO / Wakeup<br />
| GPIO_S5_1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 23 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 83<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 249<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 24<br />
| GPIO_PWM1<br />
| PWM / GPIO<br />
|-<br />
| GPIO / Wakeup<br />
| GPIO_S5_4<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 25 <br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 84<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 208<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 26<br />
| GPIO_IBL_8254<br />
| Timer / GPIO<br />
|}<br />
<br />
'''NOTE:''' Pins 5-26 are shown above with their '''PRIMARY''' configuration, any pin may be switched to being a generic GPIO as well. This would give a total of 22 GPIOs, with two of those being PWM capable.<br />
<br />
{|<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have issues with firmware prior to 0.71 (8/13/2014 build)<br />
|-<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have been tested and work as expected. Remember to drive the pin to ground.<br />
|-<br />
|}<br />
<br />
==== High Speed Expansion (Bottom) ====<br />
The High speed connector uses a TE Connectivity compatible 60-pin header. The generally recommended header is the 3-5177986-2, or the 60POS .8MM FH 8H GOLD part that rises 7.85mm, allowing for 3/8" standoffs at the corners to be used to attach the lure to the minnowboard.<br />
<br />
Link to connector used: [http://www.digikey.com/product-detail/en/5177985-2/A99190CT-ND/1894007 http://www.digikey.com/product-detail/en/5177985-2/A99190CT-ND/1894007]. mating connectors are listed at the bottom but include:<br />
<br />
* '''A99196DKR-ND''' - CONN PLUG 60POS .8MM FH 5H GOLD<br />
* '''A115336-ND''' - CONN PLUG 60POS DL BRD/BRD VERT<br />
* '''5179030-2-ND''' - CONN PLUG 60POS FH .8MM BRD-BRD<br />
* '''5177984-2-ND''' - CONN PLUG 60POS VERT FH .8MM<br />
* '''[http://www.digikey.com/product-detail/en/3-5177986-2/A99215CT-ND/1894032 A99215CT-ND]''' - CONN PLUG 60POS .8MM FH 8H GOLD &nbsp;&nbsp;'''<-- Recommended connector<br />
* '''A99209CT-ND''' - CONN PLUG 60POS .8MM FH 7H GOLD<br />
* '''A99203CT-ND''' - CONN PLUG 60POS .8MM FH 6H GOLD<br />
* '''A99196CT-ND''' - CONN PLUG 60POS .8MM FH 5H GOLD<br />
* '''A99215TR-ND''' - CONN PLUG 60POS .8MM FH 8H GOLD<br />
* '''A99209TR-ND''' - CONN PLUG 60POS .8MM FH 7H GOLD<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Ground<br />
|-<br />
| mSATA_TX_P<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 3<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 4<br />
| mSATA_RX_P<br />
|-<br />
| mSATA_TX_N<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 5<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 6<br />
| mSATA_RX_N<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 7<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 8<br />
| +5V SB<br />
|-<br />
| mPCIE_REFCLK_P<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 9<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 10<br />
| USB_HOST_DP<br />
|-<br />
| mPCIE_REFCLK_N<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 11<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 12<br />
| USB_HOST_DN<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 13<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 14<br />
| Ground<br />
|-<br />
| mPCIE_TX_P<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 15<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 16<br />
| mPCIE_RX_P<br />
|-<br />
| mPCIE_TX_N<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 17<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 18<br />
| mPCIE_RX_N<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 19<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 20<br />
| +5V SB<br />
|-<br />
| EXP_I2C_SCL (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 21<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 22<br />
| mPCIE_WAKEB<br />
|-<br />
| EXP_I2C_SDA (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 23<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 24<br />
| mPCIe_CLKREQ3_B<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 25<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 26<br />
| Ground<br />
|-<br />
| EXP_GPIO1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 27<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 28<br />
| EXP_GPIO3<br />
|-<br />
| EXP_GPIO2<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 29<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 30<br />
| EXP_GPIO4<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 31<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 32<br />
| +5V SB<br />
|-<br />
| EXP_GPIO6 (XDP_H_OBSDATA_A1)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 33<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 34<br />
| EXP_GPIO5 (XDP_H_OBSDATA_A0)<br />
|-<br />
| EXP_GPIO7 (XDP_H_OBSDATA_A2)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 35<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 36<br />
| EXP_GPIO8 (XDP_H_OBSDATA_A3)<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 37<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 38<br />
| Ground<br />
|-<br />
| XDP_H_PRDYB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 39<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 40<br />
| XDP_H_PREQB_PB<br />
|-<br />
| PMC_RSMRST<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 41<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 42<br />
| FP_PWRBTN<br />
|-<br />
| +5V SB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 43<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 44<br />
| +5V SB<br />
|-<br />
| PMC_CORE_PWROK<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 45<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 46<br />
| PMC_RSTBTN<br />
|-<br />
| PMC_PLTRST_R_V1P8<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 47<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 48<br />
| ILB_RTC_TESTB<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 49<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 50<br />
| Ground<br />
|-<br />
| <br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 51<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 52<br />
| XDP_H_TRSTB<br />
|-<br />
| <br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 53<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 54<br />
| XDP_H_TCK<br />
|-<br />
| +V1P8A<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 55<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 56<br />
| XDP_H_TMS<br />
|-<br />
| +V1P8A<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 57<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 58<br />
| XDP_H_TDI<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 59<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 60<br />
| Ground<br />
|}<br />
<br />
===== GPIO Mapping =====<br />
<br />
{| width="85%" style="text-align:center;"<br />
! width="20%" | Name<br />
! width="5%" | Pin<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Linux GPIO #<br />
! width="5%" | Pin<br />
! width="20%" | Name<br />
|-<br />
| EXP_I2C_SCL (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 21<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 245<br />
|-<br />
| EXP_I2C_SDA (I2C #6)<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 23<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | 244<br />
|-<br />
| colspan="6" | [...]<br />
|-<br />
| EXP_GPIO1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 27<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 109<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 111<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 28<br />
| EXP_GPIO3<br />
|-<br />
| EXP_GPIO2<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 29<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 110<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 112<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 30<br />
| EXP_GPIO4<br />
|-<br />
| colspan="6" | [...]<br />
|-<br />
| EXP_GPIO6<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 33<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 105<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 106<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 34<br />
| EXP_GPIO5<br />
|-<br />
| EXP_GPIO7<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 35<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 107<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | 108<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 36<br />
| EXP_GPIO8<br />
|-<br />
|}<br />
<br />
'''NOTE:''' The I2C pins have the same property as the pins in the Low Speed Expansion Header, in that their primary purpose is I2C, but can be switched to GPIO in the firmware. In firmware this is the I2C #6<br />
<br />
{|<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: #FF99CC;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have issues with firmware prior to 0.71 (8/13/2014 build)<br />
|-<br />
| style="border-style: solid; border-width: 1px;text-align:center;background-color: lightblue;" | &nbsp;&nbsp;&nbsp;&nbsp;<br />
| Denotes Pins that have been tested and work as expected. Remember to drive the pin to ground.<br />
|-<br />
|}<br />
<br />
==== SPI Header to Firmware flashing J1 ====<br />
This is a pinned out port to allow for external flashing of the boot spi. Dediprog and Flyswatter devices have been tested and verified to work with this.<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| DDP_1V8<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Ground<br />
|-<br />
| DDP_SPI_CS<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 3<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 4<br />
| DDP_SPI_CLK<br />
|-<br />
| DDP_SPI_MISO<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 5<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 6<br />
| DDP_SPI_MOSI<br />
|-<br />
| <br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 7<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 8<br />
| DDP_IO3L<br />
|}<br />
<br />
==== Power Connection J2 (SIP2_FAN) ====<br />
This is a 5V 2-pin pin out originally intended to be used for a CPU fan. The single core (E3815) and the dual core (E3825) however use passive heat sinks, and thus do not, under normal circumstances, need a fan. It is theoretically possible to pull upwards of 1A through this port, however you should refer to the released schematics to verify that number before attempting to use this for anything.<br />
<br />
'''NOTE:''' This is not populated on the Single, or Dual core boards. This can be populated if needed, and will provide the above power<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| Ground<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| +5VSB<br />
|}<br />
<br />
==== Switch Jumper J5 ====<br />
This pin is intended to allow for power toggling via a remote switch or relay. It is fundamentally no different than pressing SW1, and behaves identically.<br />
<br />
'''NOTE:''' This is not populated, by default.<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
| +5VSB<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| Ground<br />
|}<br />
<br />
==== SATA LED J6 ====<br />
J6 header is allows for an external LED to be connected to the SATA interface's activity signal. when a LED is connected to this header it will blink based on the amount of SATA read/write activity.<br />
<br />
'''NOTE:''' This is not populated, by default.<br />
<br />
===== Layout =====<br />
{| width="85%" style="text-align:center;"<br />
! width="25%" | Description<br />
! width="5%" | Pin<br />
! width="5%" | Pin<br />
! width="25%" | Description<br />
|-<br />
|<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 1<br />
| style="border-style: solid; border-width: 1px;text-align:center;" | 2<br />
| +V1P8S<br />
|}<br />
<br />
==== SD Card Write Protect J7 ====<br />
<br />
This is a jumper point, mostly available for debugging, that enables the sd card write protect explictily. This is not populated on production boards.<br />
=== Design Files ===<br />
<br />
'''NOTE: All design files are released under Creative Commons CC-BY-SA (http://creativecommons.org/)'''<br />
<br />
The MinnowBoard Max is intended to comply with all requirements and guidelines set forth by the Open Source Hardware Association (http://www.oshwa.org/)<br />
<br />
<br><br />
* [[media:MinnowMax_RevA1_sch.pdf|Schematic (PDF)]]<br />
* [[media:MinnowMax_RevA1_dsn.zip|Schematic (Orcad DSN)]]<br />
* [[media:MinnowMax_RevA1_brd.zip|Board Layout (Allegro BRD)]]<br />
* [[media:MinnowMax_RevA1_mfg.zip|Gerbers]]<br />
* [[media:MinnowMax_RevA1_bom.zip|Bill of Materials]]<br />
<br><br />
<br><br />
<br />
=== Known Issues ===<br />
----<br />
==== MinnowBoard-MAX Open Bugs (Bugzilla) ====<br />
<br />
* Bugzilla:<br/> We currently use the YoctoProject Bugzilla instance at [http://bugzilla.yoctoproject.org http://bugzilla.yoctoproject.org]<br />
* Bug Triage link can be found at: [https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage]<br />
<br />
==== A1 ====<br />
----<br />
===== Hardware =====<br />
----<br />
====== USB ======<br />
There is a potential issue when using a powered USB Hub. If the hub, erroneously, provides power over the USB 3 or USB 2 input connector, the MinnowBoard MAX will use that as power. This is in violation of the USB spec, and will be rectified in a later revision of the MinnowBoard MAX.<br />
<br />
Hubs known to cause this:<br />
* iXCC 7 Port USB 3.0 Hub<br />
** [http://www.amazon.com/iXCC-Firmware-backwards-compatibility-External/dp/B00GLJIPK6/ref=sr_1_2?ie=UTF8&qid=1403830109&sr=8-2&keywords=ixcc+usb3+powered+hub Amazon Link]<br />
** [http://ixcc.com/ iXCC Website]<br />
<br />
It is suggested that you check powered USB hubs to confirm that they do not provide power back to the board, as described, and if a hub is found to do this, please report it here. A hub found to be doing this should be used without being externally powered if used at all.<br />
<br />
===== Firmware =====<br />
----<br />
See the bug list, linked above.<br />
<br />
----<br />
<br />
There are some reports of corruption of the UEFI firmware<br />
<br />
Symptoms are no display, 2 leds on, and this [[serial]] output trace :<br />
<br />
<pre><br />
>>>>SecStartup<br />
>>>>MemoryInit Done<br />
>>>>BdsEntry<br />
</pre><br />
<br />
<br />
Hints :<br />
<br />
* https://dockr.eurogiciel.fr/blogs/embedded/tizen-minnowboard-max<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140721/000203.html<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140804/000236.html<br />
* http://irc.minnowboard.org/%23minnowboard.2014-08-07.log.html<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140811/000309.html# Important - Firmware Update<br />
* https://bugzilla.yoctoproject.org/show_bug.cgi?id=6585#c26<br />
<br />
<br />
Resources : <br />
<br />
* http://www.elinux.org/Minnowboard:SPI_Boot_flash : said to apply to Max<br />
* http://www.elinux.org/Minnowboard:Hardware_Revisions<br />
* [https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage MinnowBoard Bugs]<br />
<br />
'''This should be resolved in firmware's after 8/13/2014'''<br />
<br />
<br />
<br />
===== Unknown =====<br />
----<br />
====== Monitors ======<br />
<br />
There is an issue with regards to some monitors not being able to display from the MinnowBoard MAX. Most monitors seem to be fine, but some will either completely not show a display (even at firmware boot-up) or may only show a display after the operating system is booting.<br />
<br />
This turns out to be an issue with regards to HDMI vs. DVI detection and initialization. A work around is being added into the firmware to resolve this.<br />
<br />
'''This is fixed in firmware's after 8/13/2014'''</div>Dvharthttps://elinux.org/index.php?title=Calamari_Lure&diff=352640Calamari Lure2014-10-05T21:12:29Z<p>Dvhart: </p>
<hr />
<div>= Description =<br />
<gallery><br />
File:Calamari1.jpg|Angled<br />
File:Calamari2.jpg|Side-1<br />
File:Calamari3.jpg|Side-2<br />
File:Calamari4.jpg|Side-3<br />
File:Calamari5.jpg|Side-4<br />
File:Calamari6.jpg|Top<br />
<br />
</gallery><br />
<br />
== General Information ==<br />
The Calamari Lure is designed as a demonstration platform for the MinnowBoardMax<br />
<br />
== Features ==<br />
<br />
* 2 PWM controlled LEDS<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_PWM_00 || LED1 || PWM<br />
|-<br />
| SIO_PWM_11 || LED2 || PWM<br />
|}<br />
<br><br />
* GPIO Output controlled 7 Segment LED display<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| GPIO_S5_2 || Clock || GPIO Output<br />
|-<br />
| LPE_I2S2_DATAIN || Data || GPIO Output<br />
|-<br />
| LPE_I2S2_DATAOUT || Latch || GPIO Output<br />
|-<br />
| LPE_I2S2_FRM || Clear || GPIO Output<br />
|}<br />
<br><br />
* ADC input using a variable resistor slider potentiometer via a SPI based ADC<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_SPI_CS || Chip Select || SPI<br />
|-<br />
| SIO_SPI_DO || Data Out || SPI<br />
|-<br />
| SIO_SPI_DI || Data In || SPI<br />
|-<br />
| SIO_SPI_CLK || Clock || SPI<br />
|}<br />
<br><br />
<br />
* 3 GPIO inputs using a buttons<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| LPE_I2S2_CLK || S1 || GPIO Input<br />
|-<br />
| SIO_UART1_CTS || S2 || GPIO Input<br />
|-<br />
| SIO_UART1_RTS || S3 || GPIO Input<br />
|}<br />
<br><br />
* dual TTL uarts<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_UART1_TX || UART1 TX || UART<br />
|-<br />
| SIO_UART1_RX || UART1 RX || UART<br />
|-<br />
| SIO_UART2_TX || UART2 TX || UART<br />
|-<br />
| SIO_UART2_RX || UART2 RX || UART<br />
|}<br />
<br><br />
* RGB GPIO controlled LED<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| GPIO_S5_0 || RED || GPIO Output<br />
|-<br />
| GPIO_S5_1 || GREEN || GPIO Output<br />
|-<br />
| ILB_8254_SPKR || BLUE || GPIO Output<br />
|}<br />
<br><br />
* I2C EEPROM at 0x50<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_I2C5_DATA || I2C Data || I2C<br />
|-<br />
| SIO_I2C5_CLK || I2C Clock || I2C<br />
|}<br />
<br><br />
<br />
== Reference Material ==<br />
<br />
* [http://www.protostack.com/blog/2011/06/atmega168a-pulse-width-modulation-pwm/ PWM Tutorial]<br />
* [http://conductiveresistance.com/interactive-595-shift-register-simulator/ 595 Tutorial]<br />
* [http://en.wikipedia.org/wiki/Seven-segment_display_character_representations 7 Segment Display Character Mapping]<br />
* [https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iio/adc/mcp320x.c?id=v3.14 MCP320x Linux Kernel Device Driver]<br />
* [https://www.kernel.org/doc/Documentation/spi/spidev SPIDEV - userspace SPI character device driver interface documentation]<br />
* [https://www.kernel.org/doc/Documentation/i2c/dev-interface I2CDEV - userspace I2C character device driver interface documentation]<br />
<br><br />
<br><br />
<br />
= Design =<br />
<br />
== Components ==<br />
<br />
* Single tricolored surface mount RGB LED ([[media:rgb-led-smd.pdf|datasheet]])<br />
* 74HC595 Serial Shift Register ([[media:74hc595.pdf|datasheet]])<br />
* 7 Segment Display ([[media:7seg-display.pdf|datasheet]])<br />
* 10k Slider Potentiometer ([[media:10k-slider.pdf|datasheet]])<br />
* NPN Transistor MMBT2222A ([[media:mmbt2222a.pdf|datasheet]])<br />
* Microchip MCP3004 SPI Based Analog-to-Digital converter ([[media:MCP3004.pdf|datasheet]])<br />
* CAT24C256W I2C based EEPROM ([[media:CAT24C256W.pdf|datasheet]])<br />
* Button<br />
<br />
== Design Files ==<br />
<br />
* [[media:Calamari_Lure_RevX1.pdf|Schematic]]<br />
<br />
== Test Files ==<br />
<br />
* https://github.com/MinnowBoard/minnow-max-extras</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=348908Minnowboard:MinnowMaxYoctoProject2014-09-04T22:23:53Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
The MinnowBoard-MAX ships with 64b firmware. If you wish to use it in 32b mode, you will need to [https://uefidk.com/content/minnowboard-max download the 32b firmware].<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b daisy git://git.yoctoproject.org/poky<br />
$ git clone -b daisy git://git.yoctoproject.org/meta-intel<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
$ echo 'MACHINE = "intel-core-i7-64"' >> conf/local.conf<br />
<br />
Or, if you are building the 32b image:<br />
<br />
$ echo 'MACHINE = "intel-core2-32"' >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32<br />
<br />
=Next Steps=<br />
Now that you can build a basic image, you can experiment with some of the other example images:<br />
<br />
$ bitbake core-image-sato<br />
$ bitbake core-image-sato-sdk<br />
<br />
Or create your own image recipes, adding packages to suit your needs. For details on developing with the Yocto Project, please see the [https://www.yoctoproject.org/documentation Yocto Project Documentation].</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=348902Minnowboard:MinnowMaxYoctoProject2014-09-04T22:20:57Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b daisy git://git.yoctoproject.org/poky<br />
$ git clone -b daisy git://git.yoctoproject.org/meta-intel<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
$ echo 'MACHINE = "intel-core-i7-64"' >> conf/local.conf<br />
<br />
Or, if you are building the 32b image:<br />
<br />
$ echo 'MACHINE = "intel-core2-32"' >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32<br />
<br />
=Next Steps=<br />
Now that you can build a basic image, you can experiment with some of the other example images:<br />
<br />
$ bitbake core-image-sato<br />
$ bitbake core-image-sato-sdk<br />
<br />
Or create your own image recipes, adding packages to suit your needs. For details on developing with the Yocto Project, please see the [https://www.yoctoproject.org/documentation Yocto Project Documentation].</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=348896Minnowboard:MinnowMaxYoctoProject2014-09-04T22:18:16Z<p>Dvhart: /* Exact Steps */</p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone -b daisy git://git.yoctoproject.org/poky<br />
$ git clone -b daisy git://git.yoctoproject.org/meta-intel<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
$ echo 'MACHINE = "intel-core-i7-64"' >> conf/local.conf<br />
<br />
Or, if you are building the 32b image:<br />
<br />
$ echo 'MACHINE = "intel-core2-32"' >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=348890Minnowboard:MinnowMaxYoctoProject2014-09-04T22:17:18Z<p>Dvhart: </p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone git://git.yoctoproject.org/poky daisy<br />
$ git clone git://git.yoctoproject.org/meta-intel daisy<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
$ echo 'MACHINE = "intel-core-i7-64"' >> conf/local.conf<br />
<br />
Or, if you are building the 32b image:<br />
<br />
$ echo 'MACHINE = "intel-core2-32"' >> conf/local.conf<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MinnowMaxYoctoProject&diff=348884Minnowboard:MinnowMaxYoctoProject2014-09-04T22:15:35Z<p>Dvhart: Created page with "The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release. If you are new to the Yocto Pr..."</p>
<hr />
<div>The MinnowBoard-MAX is supported by the Yocto Project and the meta-intel intel-corei7-64 and intel-core2-32 BSPs as of the 1.6 (daisy) release.<br />
<br />
If you are new to the Yocto Project, you should first familiarize yourself with the build environment by working through the [http://www.yoctoproject.org/docs/1.6.1/yocto-project-qs/yocto-project-qs.html Yocto Project Quick Start Guide].<br />
<br />
The Yocto Project incorporates a build system and meta data for cross-compiling embedded Linux OS images for a variety of architectures and boards. Additional software packages and hardware support are added through [http://layers.openembedded.org/layerindex/branch/master/layers/ layers]. You interact with the build system primarily through the '''bitbake''' command.<br />
<br />
=Exact Steps=<br />
Checkout the latest sources of the poky and meta-intel repositories:<br />
<br />
$ cd<br />
$ mkdir source<br />
$ cd source<br />
$ git clone git://git.yoctoproject.org/poky daisy<br />
$ git clone git://git.yoctoproject.org/meta-intel daisy<br />
<br />
Initialize the build environment:<br />
<br />
$ cd poky<br />
$ source oe-init-build-env<br />
<br />
Configure the build environment for the MinnowBoard-MAX:<br />
<br />
$ echo 'BBLAYERS += "$HOME/source/meta-intel"' >> conf/bblayers.conf<br />
$ echo 'MACHINE = "intel-core-i7-64"' >> conf/local.conf<br />
<br />
Or, if you are building the 32b image:<br />
<br />
$ echo "MACHINE=<br />
<br />
Now kick off a basic build:<br />
<br />
$ bitbake core-image-minimal<br />
<br />
The result will be a basic console image located here:<br />
<br />
tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg<br />
<br />
You can write this image to a USB key, SATA drive, or SD card using the mkefidisk.sh script included with poky (scripts/contrib/mkefidisk.sh):<br />
<br />
$HOME/poky/scripts/contrib/mkefidisk.sh HOST_DEVICE tmp/deploy/images/intel-corei7-64/core-image-minimal-intel-corei7-64.hddimg TARGET_DEVICE<br />
<br />
Where HOST_DEVICE is the device node on the build system, like /dev/sdc or /dev/mmcblk0 and TARGET_DEVICE is the name of the device as the MinnowBoard-MAX will see it, likely /dev/sda or /dev/mmcblk0. You may want to copy mkefidisk.sh somewhere in your PATH to save on typing.<br />
<br />
With the boot device provisioned, you can insert the media into the MinnowBoard-MAX and boot. It should detect the media and boot to the bootloader and subsequently the OS automatically, if not, you can do so manually from the EFI shell as follows:<br />
<br />
Shell> connect -r<br />
Shell> map -r<br />
Shell> fs0:<br />
Shell> bootx64<br />
<br />
Or for a 32 bit image:<br />
<br />
Shell> bootia32</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MaxBios&diff=344402Minnowboard:MaxBios2014-08-07T16:33:00Z<p>Dvhart: Replace bug query with the Bug Triage wiki report which provide a great deal more context.</p>
<hr />
<div>The MinnowBoard MAX uses a UEFI system level firmware, and provides both the UEFI shell, and a typical BIOS style menu interface.<br />
<br />
= UEFI Shell =<br />
<br />
[[file:MinnowMaxUEFIShell.png|400px|thumb|right|UEFI Shell prompt]]<br />
The simplest way to get to the UEFI shell is to:<br />
# Make sure that the MinnowBoard MAX is powered down<br />
# Disconnect all bootable media<br />
## USB drives<br />
## SATA drives<br />
## SD cards<br />
# Power on the MinnowBoard MAX<br />
<br />
At this point you should get a screen that looks very similar to the one at right. This is the UEFI Shell, there are a number of commands that can be done here, and the system can be explored in great depth from this interface.<br />
<br />
Places to find more information about UEFI shell and it's commands:<br />
* [https://software.intel.com/en-us/articles/uefi-shell https://software.intel.com/en-us/articles/uefi-shell]<br />
* [http://www.sysadminshare.com/2012/01/efi-shell-commands.html http://www.sysadminshare.com/2012/01/efi-shell-commands.html]<br />
<br />
= BIOS menu =<br />
[[file:MinnowMaxFirmwareExit.png|400px|thumb|right|Exit UEFI Shell prompt]]<br />
The BIOS menu gives a more traditional way to configure the basic firmware parameters on the system, set the GPIO pinmux states and perform the typical tasks one would expect to do in these menus.<br />
<br />
To get to it:<br />
#Key-press way<br />
##Press F2 during bootup to jump directly to it<br />
#UEFI Shell way<br />
## Follow the steps to get to the UEFI Shell (above)<br />
## Type the following:<br />
''exit''<br />
You should now get a screen that looks like the following:<br />
[[file:MinnowMaxBIOSDeviceManagement.png|400px|Main BIOS menu screen]]<br />
<br />
This is the main menu on the BIOS menu<br />
<br />
= BIOS Menu Tree =<br />
== Continue ==<br />
This just continues the boot process<br />
== Select Language ==<br />
This adjusts the language that the bios is displayed in<br />
== Boot Manager ==<br />
This adjusts the basic boot options, including what to boot to.<br />
=== EFI Internal Shell ===<br />
This will boot to the UEFI shell<br />
== Device Manager ==<br />
This allows for the configuration of specific devices on the system<br />
=== System Setup ===<br />
Configure System Settings<br />
==== Main ====<br />
Contains:<br />
* Bios Information<br />
** IFWI Version<br />
** BIOS Version<br />
** BIOS Vendor<br />
** Core Version<br />
** Build Time<br />
* Processor Information<br />
** Type<br />
** SKU Type<br />
** Speed<br />
** Family/Model/Step<br />
** Microcode Revision<br />
** Number of Cores<br />
** 64-bit capability<br />
* System Date<br />
* System Time<br />
===== Platform Information =====<br />
* Platform firmware Information<br />
** VLV SOC<br />
** MRC Version<br />
** PUNIT FW Patch<br />
** PMC FW Patch<br />
** KSC FW<br />
** TXE FW Version<br />
** GOP<br />
** CPU Flavor<br />
** Board ID<br />
** Fab ID<br />
* Memory Information<br />
** Total Memory<br />
** Memory Speed<br />
** L1 Data Cache<br />
** L1 Instruction Cache<br />
** L2 Cache RAM<br />
==== CPU Configuration ====<br />
Hyperthreading Supprt: (Chip doesn't support it)<br />
===== CPU Power Management =====<br />
&lt;no options&gt;<br />
==== Uncore Configuration ====<br />
* GOP Configuration<br />
** GOP Driver<br/>'''Enable''' / Disable<br/>Enabled: will unload VBIOS; Disabled it will load VBIOS<br />
** GOP Brightness Level<br/>20/40/60/'''80'''/100/120/140/160/180/200/220/240/255<br/> Sets the GOP brightness<br />
* IGD Configuration (Integrated Graphics Device)<br />
** Integrated Graphics Device<br/>'''Enable''' / Disable<br/>Enable or disabled the integrated graphics. '''NOTE:''' If you disable this, the only way to turn it back on is via the serial port<br />
** Primary Display<br/>'''IGD''' / Auto / PCIe<br />
** RC6 (Render Standby)<br/>'''Enable''' / Disable<br />
** PAVC<br/> '''LITE Mode''' / Disable / SERPENT Mode<br />
** DOP CG<br/> '''Enable''' / Disable<br />
** GTT Size<br/> '''2MB''' / 1MB<br />
** Aperture Size<br/>'''256MB''' / 128MB / 512MB<br />
** DVMT Pre-Allocated<br/>'''64M''' / 96M / 128M / 160M / 192M / 224M / 256M / 288M / 320M / 352M / 384M / 416M / 448M / 480M / 512M<br />
** DVMT Total Gfx Mem<br/>'''256M''' / 128M / MAX<br />
** IGD Turbo<br/>'''Auto''' / Enable / Disable<br />
* IGD - LCD Control<br />
** Force Lid Status<br/>'''Auto''' / OFF / ON<br />
** BIA<br/>'''Auto''' / Disabled / Level 1 / Level 2 / Level 3 / Level 4 / Level 5<br />
** ALS Support<br/>'''Disable''' / Enable<br />
** LCD Panel Type<br/>'''Auto''' / 640x480 / 800x600 / 1024x768 / 1280x1024 / 1366x768 / 1680x1050 / 1920x1200 / 1280x800<br />
** IGD Boot Type<br/>'''Auto''' / VGA Port / HDMI / DP Port B / DB Port C / eDP / DSI PORT A / DSI PORT C<br />
** Panel Scaling<br/>'''Auto''' / Centering / Stretching<br />
** GMCH BLC Control<br/>'''PWM-Inverted''' / GMBus-Inverted / PWM-Normal / GMBus-Normal<br />
* ISP PCI Device Configuration<br />
** ISP Enable / Disable<br/>'''Enable''' / Disable<br />
** ISP PCI Device Selection<br/>'''ISP PCI Device as B0D2F0''' / Disable / ISP PCI Device as B0D3F0<br />
==== South Cluster Configuration ====<br />
The South Cluster can be thought of like an old south bridge chipset.<br />
===== PCI Express Configuration =====<br />
* PCIe 0 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>'''UNUSED'''<br />
* PCIe 1 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>'''UNUSED'''<br />
* PCIe 2 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>Gigabit Ethernet<br />
* PCIe 3 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>High Speed Connector<br />
* PCI Express Root Port 1<br/>'''Enable''' / Disable<br />
* PCI Express Root Port 2<br/>'''Disable''' / Enable<br />
* PCI Express Root Port 3<br/>'''Enable''' / Disable<br />
* PCI Express Root Port 4<br/>'''Disable''' / Enable<br />
===== USB Configuration =====<br />
* USB Controller Auto Mode<br/>'''Enable''' / Disable<br />
** XHCI Controller<br/>'''Enable''' / Disable<br/>'''NOTE:''' This series of options is only available if Disable is selected for the previous setting<br />
*** HSIC #0<br/>'''Disable''' / Enable<br />
** XHCI Mode<br/>'''Enable''' / Disable<br />
** USB2 Link Power Management<br/>'''Enable''' / Disable<br />
* USB OTG Support<br/>'''Disable''' / PCI Mode<br/>'''NOTE:''' The Baytrail-I (which the MinnowBoard MAX uses) does not have an OTG capable port<br />
* USB VBUS<br/>'''ON''' / OFF / Auto<br />
* EHCI Controller<br/>'''Disable''' / Enable<br/>This is normally greyed out<br />
* USB RMH Mode<br/>'''Enable''' / Disable<br/>This is normally greyed out<br />
* USB EHCI debug<br/>'''Disable''' / Enable<br/>This is normally greyed out<br />
* USB Per-Port Control<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #0<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #1<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #2<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #3<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
===== Audio Configuration =====<br />
* LPE Audio Support<br/>'''Disable''' / LPE Audio PCI mode / LPE Audio ACPI mode<br/>'''NOTE:''' Audio is available via I2S, but requires a codec chip to be useful. This is intended to be resolved in a later lure.<br />
* Audio Controller<br/>'''Enable''' / Disable<br />
** Azalia VCi Enable<br/>'''Enable''' / Disable<br />
** Azalia Docking Support Enable<br/>'''Disable''' / Enable<br />
** Azalia PME Enable<br/>'''Enable''' / Disable<br />
** Azalia HDMI Codec<br/>'''Enable''' / Disable<br />
===== SATA Drives =====<br />
* Chipset-SATA Controller Configuration<br />
** Chipset SATA<br/>'''Enable''' / Disable<br />
* SATA Test Mode<br/>'''Disable''' / Enable<br />
** Chipset SATA Mode<br/>'''AHCI''' / IDE<br />
*** SATA Port 0<br/>&#91;Not Installed&#93;<br/>'''NOTE:''' This is the port pinned out, when a drive is present it's name will be populated<br />
*** SATA Port 1<br/>&#91;Not Installed&#93;<br/>'''NOTE:''' Not used, not pulled out from the SOC<br />
*** SATA Port 0 Hot Plug<br/>'''Enable''' / Disable<br />
* Capability<br />
** SATA Port 1 Hot Plug<br/>'''Enable''' / Disable<br/>'''Note:''' This port is not used on the MinnowBoard MAX<br />
* Capability<br />
===== LPSS & SCC Configuration =====<br />
This is used to configure the various Low-speed pin connections on the MinnowBoard MAX<br />
<br />
* LPSS & SCC Devices Mode<br/>'''PCI Mode''' / ACPI Mode<br />
<br/><br />
* SCC Configuration<br />
* SCC eMMC Boot Controller<br/>'''Auto Detect''' / Disable / eMMC 4.41 / eMMC 4.5<br />
* eMMC Secure Erase<br/>'''Disable''' / Enable<br />
<br/><br />
* SCC eMMC45 Support<br/>'''Enable''' / Disable<br/>Greyed out<br />
* DDR50 Capability Support<br/>'''Enable''' / Disable<br/>Greyed out<br />
* HS200 Capability Support<br/>'''Enable''' / Disable<br/>Greyed out<br />
* Re Tune Timer Value<br/>'''8'''<br/>Greyed out<br />
<br/><br />
* SCC SDIO Support<br/>'''Enable''' / Disable<br />
* SCC SD Card Support<br/>'''Enable''' / Disable<br />
* SDR25 Capability Support for SDCard<br/>'''Disable''' / Enable<br/>Greyed out<br />
* DDR50 Capability Support for SDCard<br/>'''Enable''' / Disable<br/>Greyed out<br />
<br/><br />
* LPSS 1 Configuration<br />
* LPSS DMA #1 Support<br/>'''Enable''' / Disable<br />
* LPSS HSUART #1 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pins #6, #8, #10, #12<br />
* LPSS HSUART #1 FlowCtrl<br/>'''Enable''' / Disable<br/>'''Note:''' This is only available when HSUART #1 is on<br />
* LPSS HSUART #2 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pins #17, #19. HSUART #2 does not have hardware FlowControl due to lack of CTS/RTS lines being pulled out<br />
* LPSS HSUART #2 FlowCtrl<br/>'''Enable''' / Disable<br/>'''Note:''' This is only available when HSUART #2 is on<br/>'''Note:''' Hardware Flow Control is not available, since CTS / RTS are not pulled out and available<br />
* LPSS PWM #1 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pin #22<br />
* LPSS PWM #2 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pin #24<br />
* LPSS SPI Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pins #5, #7, #9, #11<br />
<br/><br />
* LPSS 2 Configuration<br />
* LPSS DMA #2 Support<br/>'''Enable''' / Disable<br />
* LPSS I2C #5 Support<br/>'''Enable''' / Disable<br/>'''Note:''' This is what's used on the Low-speed pins #13, #15<br />
* LPSS I2C #6 Support<br/>'''Enable''' / Disable<br/>'''Note:''' This is what's used for the High Speed I2C pins<br />
<br/><br />
* I2C Devices Configuration<br />
* I2C Touch Device Address<br/>'''Auto'' / 0x4B / 0x4A<br />
<br/><br />
* SAR Sensor<br/>'''Enable''' / Disable<br />
<br />
===== ISCT Configuration =====<br />
[http://www.intel.com/content/www/us/en/architecture-and-technology/smart-connect-technology.html Intel Smart Connect Technlogy], this probably doesn't work with the MinnowBoard MAX, your mileage may vary and this is currently untested.<br />
<br />
* ISCT Configuration<br />
* ISCT Configuration<br/>'''Disable''' / Enable<br />
** Options Available upon '''Enable'''<br />
*** ISCT Notification Control<br/>'''Enable''' / Disable<br />
*** ISCT WLAN Power Control<br/>'''Enable''' / Disable<br />
*** ISCT WWAN Power Control<br/>'''Disable''' / Enable<br />
*** ISCT Sleep Duration Value Format<br/>'''Seconds'''<br />
*** ISCT RF Kill Support<br/>'''Physical Switch''' / Soft Switch<br/>'''Note:''' The MinnowBoard MAX does not explicitly provide either of these switches, Your Mileage May Vary<br />
<br/><br />
* WLAN Card Presence<br />
* NGFF Card Inserted<br/>'''NO''' / YES<br/>'''Note:''' The MinnowBoard MAX does not specifically support NGFF<br />
* UHPAM Card Inserted<br/>'''NO''' / YES<br />
===== Miscellaneous Configuration =====<br />
* Miscellaneous Configuration<br />
* High Precision Timer<br/>'''Enable''' / Disable<br />
* State After G3<br/>'''S0 State''' / S5 State<br />
* Clock Spread Spectrum<br/>'''Disable''' / Enable<br />
* UART Interface Selection<br/>'''Internal UART''' / SuperIO UART<br />
* PCU UART Com 1<br/>'''Enable''' / Disable<br />
* BIOS Read/Write Protection<br/>'''Disable''' / Enable<br />
* PCI MMIO Size<br/>'''2GB''' / 0.75GB / 1GB / 1.25GB / 1.5GB<br />
* PCI Express Dynamic Clock Gating<br/>'''Disable''' / Enable<br />
<br />
==== Boot ====<br />
<br />
* Fast Boot<br/>'''Disable''' / Enable<br />
* UEFI Security Boot<br/>'''Disable''' / Enable<br />
* Silent Boot<br/>'''Disable''' / Enable<br />
* BootTime Log<br/>'''Enable''' / Disable<br />
** Latest BootTime<br/>'''No Record'''<br/>'''Note:''' Greyed out<br />
<br />
==== Security Configuration ====<br />
<br />
* TXE Configuration<br />
* TXE FW Version<br/>Greyed Out<br />
* TXE FW Capabilities<br/>Greyed Out<br />
* TXE FW Features<br/>Greyed Out<br />
* TXE FW OEM Tag<br/>Greyed Out<br />
* TXE Firmware Mode<br/>Greyed Out<br />
* TXE Temporary Disable<br/>Greyed Out<br />
* TXE File System Integrity Value<br />
<br/><br />
* TPM Configuration<br />
* PTT<br/>'''Disable'''<br/>Greyed Out<br />
* Discrete TPM<br/>'''Enable''' / Disable<br />
<br/><br />
* Password Setting<br />
* Setup Administrator Password<br/>Text box, no default value<br />
* User Password<br/>Text box, no default value<br />
<br/><br />
* Intel&reg; Anti-Theft Technology Configuration<br />
* Intel&reg; ATAM<br/>'''Disable''' / Enable<br />
* Intel&reg; AT Platform PBA<br/>'''Enable''' / Disable<br />
<br />
==== Thermal ====<br />
<br />
* Processor Participant<br />
* Critical Trip Piint<br/>'''90 C''' / 15 C / 23 C / 31 C / 39 C / 47 C / 55 C / 63 C / 71 C / 79 C / 85 C / 87 C<br />
* Passive Trip Point<br/>''' 85 C ''' / 15 C / 23 C / 31 C / 39 C / 47 C / 55 C / 63 C / 71 C / 79 C / 87 C / 90 C<br />
<br/><br />
* Active Trip Points<br/>'''Disable''' / Enable<br />
<br/><br />
* Dynamic Platform & Thermal Framework<br />
* DPTF<br/>'''Disable''' / Enable<br />
** Enabling DPTF allows for the following options:<br />
*** CPU Sensor PArticipants<br />
*** Critical<br/>'''70 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 65 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Passive<br/>'''60 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Ambient Sensor Participants<br />
*** Critical<br/>'''60 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Passive<br/>'''43 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** DDR Sensor Participants<br />
*** Critical<br/>'''81 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Passive<br/>'''62 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 61 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
<br/><br />
* Scenario Design Power<br />
* Brand String<br/>'''N2805/06''' / N3510/20 / N2910/20 / N2810/15/20 / J2850/2900 / J1850/1900 / J1750/1800<br />
<br />
==== System Component ====<br />
* System Power and Performance (PnP) Configuration<br />
* SoC PnP Setting<br/>'''Auto Detect''' / Disable / Ax Stepping / Bx Stepping<br />
* CFIO/GPIO PnP Setting<br/>'''Disable''' / Enable<br />
* LPC PnP Setting<br/>'''Disable''' / Enable<br />
* FSA ON<br/>'''OFF''' / ON<br />
<br />
==== Debug Configuration ====<br />
<br />
* ACPI Memory Debug Switch<br />
* ACPI Memory Debug<br/>'''Enable''' / Disable<br />
<br/><br />
* ExI<br/>'''Disable''' / Enable<br />
* WITT Configuration<br />
* Enable WITT<br/>'''Disable''' / Enable<br />
* Enable UTS(Uart Test Suite)<br/>'''Disable''' / Enable<br />
<br/><br />
* Lakemore Configuration:<br />
* Memory Allocation Size<br/>'''0 KiB''' / 16000 KiB / 8000 KiB / 1000 KiB / 128 KiB<br />
* PDM/Dfx Setting<br/>'''PDM On''' / Perf Mode / Power Save / Debug Reserved<br />
* PDM Msg Output<br/>'''Disable''' / Main Memory / IO - TBD<br />
<br/><br />
* Enable DB2 Table<br/>'''Enable''' / Disable<br />
<br/><br />
* PM Weights<br/>'''Enable''' / Disable<br />
<br/><br />
* Disable Codec ALC-262<br/>'''NO''' / YES<br />
<br />
=== Secure Boot Configuration ===<br />
Set Secure Boot information<br />
<br />
* Current SecureBoot State<br/>'''Disabled'''<br/>Option Greyed Out<br />
* Attempt Secure Boot<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
* Secure Boot Mode<br/>'''Standard Mode''' / Custom Mode<br />
** Custom Secure Boot Options<br />
*** PK Options<br />
**** Enrolll PK<br />
***** Enroll PK Using File<br />
**** Delete PK<br />
*** KEK Options<br />
**** Enroll KEK<br />
***** Enroll KEK using File<br />
***** Signature GUID<br />
***** Commit Changes and Exit<br />
***** Discard Changes and Exit<br />
**** Delete KEK<br />
*** DB Options<br />
**** Enroll Signature<br />
***** Enroll Signature Using File<br />
***** Signature GUID<br />
***** Commit Changes and Exit<br />
***** Discard Changes and Exit<br />
**** Delete Signature<br />
*** DBX Options<br />
**** Enroll Signature<br />
***** Enroll Signature Using File<br />
***** Signature GUID<br />
***** Commit Changes and Exit<br />
***** Discard Changes and Exit<br />
**** Delete Signature<br />
<br />
=== Network Device List ===<br />
<br />
* Network Device List<br />
* MAC:--:--:--:--:--:--<br />
** Realtek PCIe GBE Family Controller (MAC:--:--:--:--:--:--)<br />
*** Basic information about the Gigabit Ethernet<br />
** IPv4 Network Configuration<br />
*** Configured<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
**** Enable DHCP<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
**** Local IP Address<br/>'''__'''<br />
**** Local NetMask<br/>'''__'''<br />
**** Local IP Gateway<br/>'''__'''<br />
**** Save Changes and Exit<br />
<br />
== Boot Maintenance Manager ==<br />
<br />
=== Boot Options ===<br />
* Go Back To Main Page<br />
==== Add Boot Option ====<br />
There will be a list of bootable options here <br />
<br />
==== Delete Boot Option ====<br />
* EFI Internal Shell<br/>&#91;&nbsp;&#93; / &#91;X&#93;<br />
* EFI USB Device<br/>&#91;&nbsp;&#93; / &#91;X&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Change Boot Order ====<br />
* Change the order<br/>'''&lt;EFI Internal Shell&gt;<br/>&lt;EFI USB Device&gt;'''<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Driver Options ===<br />
* Go Back To Main Page<br />
==== Add Driver Options ====<br />
* Add Driver Option Using File<br />
<br />
==== Delete Driver Option ====<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Change Driver Order ====<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Console Options ===<br />
* Go Back To Main Page<br />
<br />
==== Console Input Device Select ====<br />
* UEFI Path for Serial<br/>'''&#91;X&#93;''' / &#91;&nbsp;&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Console Output Device Select ====<br />
* UEFI Path ACPI Address<br/>'''&#91;X&#93;''' / &#91;&nbsp;&#93;<br />
* UEFI Path Serial Address<br/>'''&#91;X&#93;''' / &#91;&nbsp;&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Console Standard Error Device Select ====<br />
* UEFI Path ACPI Address<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
* UEFI Path Serial Address<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Console Output Mode Select ====<br />
* Set Console Output Mode<br/>'''100 x 31''' / 80 x 25<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== COM Attribute Setup Page ====<br />
* Go Back To Main Page<br />
===== Set COM Attributes =====<br />
* Set COM Baud Rate<br/>'''115200''' / 57600 / 38400 / 19200 / 9600 / 7200 / 4800 / 3600 / 2400 / 1800 / 1200 / 600 / 300 / 150 / 134 / 110 / 75 / 50<br />
* Set COM Data Bits<br/>'''8''' / 5 / 6 / 7<br />
* Set COM Parity<br/>'''None''' / Even / Odd / Mark / Space<br />
* Set COM Stop Bits<br/>'''One''' / One and A Half / Two<br />
* Set COM Terminal Type<br/>'''PC_ANSI''' / VT_100 / VT_100_PLUS / VT_UTF8<br />
* Set COM Flow Control<br/>'''None''' / Hardware<br />
<br/><br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Discard Changes and Exit ====<br />
<br />
=== Boot From File ===<br />
* UEFI Path<br />
<br />
=== Set Boot Next Value ===<br />
* Boot Next Value<br/>'''NONE''' / EFI Internal Shell / EFI USB Device<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Set Time Out Value ===<br />
* Auto Boot Time-out<br/>'''&#91;5&#92;''' / Range: 0-65535 seconds. 0 is no wait, 65535 is wait for key press<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Reset System ===<br />
<br />
<br />
== KNOWN ISSUES ==<br />
<br />
There are some reports of corruption of the UEFI firmware<br />
<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140721/000203.html<br />
<br />
Symptoms are no display, 2 leds on, and this serial output trace :<br />
<br />
<pre><br />
>>>>SecStartup<br />
>>>>MemoryInit Done<br />
>>>>BdsEntry<br />
</pre><br />
<br />
* http://www.elinux.org/Minnowboard:SPI_Boot_flash : said to apply to Max<br />
* http://www.elinux.org/Minnowboard:Hardware_Revisions<br />
* [https://wiki.yoctoproject.org/wiki/Minnow_Bug_Triage MinnowBoard Bugs]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:MaxBios&diff=344396Minnowboard:MaxBios2014-08-07T16:27:23Z<p>Dvhart: /* KNOWN ISSUES */</p>
<hr />
<div>The MinnowBoard MAX uses a UEFI system level firmware, and provides both the UEFI shell, and a typical BIOS style menu interface.<br />
<br />
= UEFI Shell =<br />
<br />
[[file:MinnowMaxUEFIShell.png|400px|thumb|right|UEFI Shell prompt]]<br />
The simplest way to get to the UEFI shell is to:<br />
# Make sure that the MinnowBoard MAX is powered down<br />
# Disconnect all bootable media<br />
## USB drives<br />
## SATA drives<br />
## SD cards<br />
# Power on the MinnowBoard MAX<br />
<br />
At this point you should get a screen that looks very similar to the one at right. This is the UEFI Shell, there are a number of commands that can be done here, and the system can be explored in great depth from this interface.<br />
<br />
Places to find more information about UEFI shell and it's commands:<br />
* [https://software.intel.com/en-us/articles/uefi-shell https://software.intel.com/en-us/articles/uefi-shell]<br />
* [http://www.sysadminshare.com/2012/01/efi-shell-commands.html http://www.sysadminshare.com/2012/01/efi-shell-commands.html]<br />
<br />
= BIOS menu =<br />
[[file:MinnowMaxFirmwareExit.png|400px|thumb|right|Exit UEFI Shell prompt]]<br />
The BIOS menu gives a more traditional way to configure the basic firmware parameters on the system, set the GPIO pinmux states and perform the typical tasks one would expect to do in these menus.<br />
<br />
To get to it:<br />
#Key-press way<br />
##Press F2 during bootup to jump directly to it<br />
#UEFI Shell way<br />
## Follow the steps to get to the UEFI Shell (above)<br />
## Type the following:<br />
''exit''<br />
You should now get a screen that looks like the following:<br />
[[file:MinnowMaxBIOSDeviceManagement.png|400px|Main BIOS menu screen]]<br />
<br />
This is the main menu on the BIOS menu<br />
<br />
= BIOS Menu Tree =<br />
== Continue ==<br />
This just continues the boot process<br />
== Select Language ==<br />
This adjusts the language that the bios is displayed in<br />
== Boot Manager ==<br />
This adjusts the basic boot options, including what to boot to.<br />
=== EFI Internal Shell ===<br />
This will boot to the UEFI shell<br />
== Device Manager ==<br />
This allows for the configuration of specific devices on the system<br />
=== System Setup ===<br />
Configure System Settings<br />
==== Main ====<br />
Contains:<br />
* Bios Information<br />
** IFWI Version<br />
** BIOS Version<br />
** BIOS Vendor<br />
** Core Version<br />
** Build Time<br />
* Processor Information<br />
** Type<br />
** SKU Type<br />
** Speed<br />
** Family/Model/Step<br />
** Microcode Revision<br />
** Number of Cores<br />
** 64-bit capability<br />
* System Date<br />
* System Time<br />
===== Platform Information =====<br />
* Platform firmware Information<br />
** VLV SOC<br />
** MRC Version<br />
** PUNIT FW Patch<br />
** PMC FW Patch<br />
** KSC FW<br />
** TXE FW Version<br />
** GOP<br />
** CPU Flavor<br />
** Board ID<br />
** Fab ID<br />
* Memory Information<br />
** Total Memory<br />
** Memory Speed<br />
** L1 Data Cache<br />
** L1 Instruction Cache<br />
** L2 Cache RAM<br />
==== CPU Configuration ====<br />
Hyperthreading Supprt: (Chip doesn't support it)<br />
===== CPU Power Management =====<br />
&lt;no options&gt;<br />
==== Uncore Configuration ====<br />
* GOP Configuration<br />
** GOP Driver<br/>'''Enable''' / Disable<br/>Enabled: will unload VBIOS; Disabled it will load VBIOS<br />
** GOP Brightness Level<br/>20/40/60/'''80'''/100/120/140/160/180/200/220/240/255<br/> Sets the GOP brightness<br />
* IGD Configuration (Integrated Graphics Device)<br />
** Integrated Graphics Device<br/>'''Enable''' / Disable<br/>Enable or disabled the integrated graphics. '''NOTE:''' If you disable this, the only way to turn it back on is via the serial port<br />
** Primary Display<br/>'''IGD''' / Auto / PCIe<br />
** RC6 (Render Standby)<br/>'''Enable''' / Disable<br />
** PAVC<br/> '''LITE Mode''' / Disable / SERPENT Mode<br />
** DOP CG<br/> '''Enable''' / Disable<br />
** GTT Size<br/> '''2MB''' / 1MB<br />
** Aperture Size<br/>'''256MB''' / 128MB / 512MB<br />
** DVMT Pre-Allocated<br/>'''64M''' / 96M / 128M / 160M / 192M / 224M / 256M / 288M / 320M / 352M / 384M / 416M / 448M / 480M / 512M<br />
** DVMT Total Gfx Mem<br/>'''256M''' / 128M / MAX<br />
** IGD Turbo<br/>'''Auto''' / Enable / Disable<br />
* IGD - LCD Control<br />
** Force Lid Status<br/>'''Auto''' / OFF / ON<br />
** BIA<br/>'''Auto''' / Disabled / Level 1 / Level 2 / Level 3 / Level 4 / Level 5<br />
** ALS Support<br/>'''Disable''' / Enable<br />
** LCD Panel Type<br/>'''Auto''' / 640x480 / 800x600 / 1024x768 / 1280x1024 / 1366x768 / 1680x1050 / 1920x1200 / 1280x800<br />
** IGD Boot Type<br/>'''Auto''' / VGA Port / HDMI / DP Port B / DB Port C / eDP / DSI PORT A / DSI PORT C<br />
** Panel Scaling<br/>'''Auto''' / Centering / Stretching<br />
** GMCH BLC Control<br/>'''PWM-Inverted''' / GMBus-Inverted / PWM-Normal / GMBus-Normal<br />
* ISP PCI Device Configuration<br />
** ISP Enable / Disable<br/>'''Enable''' / Disable<br />
** ISP PCI Device Selection<br/>'''ISP PCI Device as B0D2F0''' / Disable / ISP PCI Device as B0D3F0<br />
==== South Cluster Configuration ====<br />
The South Cluster can be thought of like an old south bridge chipset.<br />
===== PCI Express Configuration =====<br />
* PCIe 0 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>'''UNUSED'''<br />
* PCIe 1 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>'''UNUSED'''<br />
* PCIe 2 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>Gigabit Ethernet<br />
* PCIe 3 Speed<br/>'''Auto''' / Gen1 / Gen2<br/>High Speed Connector<br />
* PCI Express Root Port 1<br/>'''Enable''' / Disable<br />
* PCI Express Root Port 2<br/>'''Disable''' / Enable<br />
* PCI Express Root Port 3<br/>'''Enable''' / Disable<br />
* PCI Express Root Port 4<br/>'''Disable''' / Enable<br />
===== USB Configuration =====<br />
* USB Controller Auto Mode<br/>'''Enable''' / Disable<br />
** XHCI Controller<br/>'''Enable''' / Disable<br/>'''NOTE:''' This series of options is only available if Disable is selected for the previous setting<br />
*** HSIC #0<br/>'''Disable''' / Enable<br />
** XHCI Mode<br/>'''Enable''' / Disable<br />
** USB2 Link Power Management<br/>'''Enable''' / Disable<br />
* USB OTG Support<br/>'''Disable''' / PCI Mode<br/>'''NOTE:''' The Baytrail-I (which the MinnowBoard MAX uses) does not have an OTG capable port<br />
* USB VBUS<br/>'''ON''' / OFF / Auto<br />
* EHCI Controller<br/>'''Disable''' / Enable<br/>This is normally greyed out<br />
* USB RMH Mode<br/>'''Enable''' / Disable<br/>This is normally greyed out<br />
* USB EHCI debug<br/>'''Disable''' / Enable<br/>This is normally greyed out<br />
* USB Per-Port Control<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #0<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #1<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #2<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
* USB Port #3<br/>'''Enable''' / Disable<br/>This is dependent on USB Controller Auto Mode being disabled<br />
===== Audio Configuration =====<br />
* LPE Audio Support<br/>'''Disable''' / LPE Audio PCI mode / LPE Audio ACPI mode<br/>'''NOTE:''' Audio is available via I2S, but requires a codec chip to be useful. This is intended to be resolved in a later lure.<br />
* Audio Controller<br/>'''Enable''' / Disable<br />
** Azalia VCi Enable<br/>'''Enable''' / Disable<br />
** Azalia Docking Support Enable<br/>'''Disable''' / Enable<br />
** Azalia PME Enable<br/>'''Enable''' / Disable<br />
** Azalia HDMI Codec<br/>'''Enable''' / Disable<br />
===== SATA Drives =====<br />
* Chipset-SATA Controller Configuration<br />
** Chipset SATA<br/>'''Enable''' / Disable<br />
* SATA Test Mode<br/>'''Disable''' / Enable<br />
** Chipset SATA Mode<br/>'''AHCI''' / IDE<br />
*** SATA Port 0<br/>&#91;Not Installed&#93;<br/>'''NOTE:''' This is the port pinned out, when a drive is present it's name will be populated<br />
*** SATA Port 1<br/>&#91;Not Installed&#93;<br/>'''NOTE:''' Not used, not pulled out from the SOC<br />
*** SATA Port 0 Hot Plug<br/>'''Enable''' / Disable<br />
* Capability<br />
** SATA Port 1 Hot Plug<br/>'''Enable''' / Disable<br/>'''Note:''' This port is not used on the MinnowBoard MAX<br />
* Capability<br />
===== LPSS & SCC Configuration =====<br />
This is used to configure the various Low-speed pin connections on the MinnowBoard MAX<br />
<br />
* LPSS & SCC Devices Mode<br/>'''PCI Mode''' / ACPI Mode<br />
<br/><br />
* SCC Configuration<br />
* SCC eMMC Boot Controller<br/>'''Auto Detect''' / Disable / eMMC 4.41 / eMMC 4.5<br />
* eMMC Secure Erase<br/>'''Disable''' / Enable<br />
<br/><br />
* SCC eMMC45 Support<br/>'''Enable''' / Disable<br/>Greyed out<br />
* DDR50 Capability Support<br/>'''Enable''' / Disable<br/>Greyed out<br />
* HS200 Capability Support<br/>'''Enable''' / Disable<br/>Greyed out<br />
* Re Tune Timer Value<br/>'''8'''<br/>Greyed out<br />
<br/><br />
* SCC SDIO Support<br/>'''Enable''' / Disable<br />
* SCC SD Card Support<br/>'''Enable''' / Disable<br />
* SDR25 Capability Support for SDCard<br/>'''Disable''' / Enable<br/>Greyed out<br />
* DDR50 Capability Support for SDCard<br/>'''Enable''' / Disable<br/>Greyed out<br />
<br/><br />
* LPSS 1 Configuration<br />
* LPSS DMA #1 Support<br/>'''Enable''' / Disable<br />
* LPSS HSUART #1 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pins #6, #8, #10, #12<br />
* LPSS HSUART #1 FlowCtrl<br/>'''Enable''' / Disable<br/>'''Note:''' This is only available when HSUART #1 is on<br />
* LPSS HSUART #2 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pins #17, #19. HSUART #2 does not have hardware FlowControl due to lack of CTS/RTS lines being pulled out<br />
* LPSS HSUART #2 FlowCtrl<br/>'''Enable''' / Disable<br/>'''Note:''' This is only available when HSUART #2 is on<br/>'''Note:''' Hardware Flow Control is not available, since CTS / RTS are not pulled out and available<br />
* LPSS PWM #1 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pin #22<br />
* LPSS PWM #2 Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pin #24<br />
* LPSS SPI Support<br/>'''Disable''' / Enable<br/>'''Note:''' Controls the state of Low-speed pins #5, #7, #9, #11<br />
<br/><br />
* LPSS 2 Configuration<br />
* LPSS DMA #2 Support<br/>'''Enable''' / Disable<br />
* LPSS I2C #5 Support<br/>'''Enable''' / Disable<br/>'''Note:''' This is what's used on the Low-speed pins #13, #15<br />
* LPSS I2C #6 Support<br/>'''Enable''' / Disable<br/>'''Note:''' This is what's used for the High Speed I2C pins<br />
<br/><br />
* I2C Devices Configuration<br />
* I2C Touch Device Address<br/>'''Auto'' / 0x4B / 0x4A<br />
<br/><br />
* SAR Sensor<br/>'''Enable''' / Disable<br />
<br />
===== ISCT Configuration =====<br />
[http://www.intel.com/content/www/us/en/architecture-and-technology/smart-connect-technology.html Intel Smart Connect Technlogy], this probably doesn't work with the MinnowBoard MAX, your mileage may vary and this is currently untested.<br />
<br />
* ISCT Configuration<br />
* ISCT Configuration<br/>'''Disable''' / Enable<br />
** Options Available upon '''Enable'''<br />
*** ISCT Notification Control<br/>'''Enable''' / Disable<br />
*** ISCT WLAN Power Control<br/>'''Enable''' / Disable<br />
*** ISCT WWAN Power Control<br/>'''Disable''' / Enable<br />
*** ISCT Sleep Duration Value Format<br/>'''Seconds'''<br />
*** ISCT RF Kill Support<br/>'''Physical Switch''' / Soft Switch<br/>'''Note:''' The MinnowBoard MAX does not explicitly provide either of these switches, Your Mileage May Vary<br />
<br/><br />
* WLAN Card Presence<br />
* NGFF Card Inserted<br/>'''NO''' / YES<br/>'''Note:''' The MinnowBoard MAX does not specifically support NGFF<br />
* UHPAM Card Inserted<br/>'''NO''' / YES<br />
===== Miscellaneous Configuration =====<br />
* Miscellaneous Configuration<br />
* High Precision Timer<br/>'''Enable''' / Disable<br />
* State After G3<br/>'''S0 State''' / S5 State<br />
* Clock Spread Spectrum<br/>'''Disable''' / Enable<br />
* UART Interface Selection<br/>'''Internal UART''' / SuperIO UART<br />
* PCU UART Com 1<br/>'''Enable''' / Disable<br />
* BIOS Read/Write Protection<br/>'''Disable''' / Enable<br />
* PCI MMIO Size<br/>'''2GB''' / 0.75GB / 1GB / 1.25GB / 1.5GB<br />
* PCI Express Dynamic Clock Gating<br/>'''Disable''' / Enable<br />
<br />
==== Boot ====<br />
<br />
* Fast Boot<br/>'''Disable''' / Enable<br />
* UEFI Security Boot<br/>'''Disable''' / Enable<br />
* Silent Boot<br/>'''Disable''' / Enable<br />
* BootTime Log<br/>'''Enable''' / Disable<br />
** Latest BootTime<br/>'''No Record'''<br/>'''Note:''' Greyed out<br />
<br />
==== Security Configuration ====<br />
<br />
* TXE Configuration<br />
* TXE FW Version<br/>Greyed Out<br />
* TXE FW Capabilities<br/>Greyed Out<br />
* TXE FW Features<br/>Greyed Out<br />
* TXE FW OEM Tag<br/>Greyed Out<br />
* TXE Firmware Mode<br/>Greyed Out<br />
* TXE Temporary Disable<br/>Greyed Out<br />
* TXE File System Integrity Value<br />
<br/><br />
* TPM Configuration<br />
* PTT<br/>'''Disable'''<br/>Greyed Out<br />
* Discrete TPM<br/>'''Enable''' / Disable<br />
<br/><br />
* Password Setting<br />
* Setup Administrator Password<br/>Text box, no default value<br />
* User Password<br/>Text box, no default value<br />
<br/><br />
* Intel&reg; Anti-Theft Technology Configuration<br />
* Intel&reg; ATAM<br/>'''Disable''' / Enable<br />
* Intel&reg; AT Platform PBA<br/>'''Enable''' / Disable<br />
<br />
==== Thermal ====<br />
<br />
* Processor Participant<br />
* Critical Trip Piint<br/>'''90 C''' / 15 C / 23 C / 31 C / 39 C / 47 C / 55 C / 63 C / 71 C / 79 C / 85 C / 87 C<br />
* Passive Trip Point<br/>''' 85 C ''' / 15 C / 23 C / 31 C / 39 C / 47 C / 55 C / 63 C / 71 C / 79 C / 87 C / 90 C<br />
<br/><br />
* Active Trip Points<br/>'''Disable''' / Enable<br />
<br/><br />
* Dynamic Platform & Thermal Framework<br />
* DPTF<br/>'''Disable''' / Enable<br />
** Enabling DPTF allows for the following options:<br />
*** CPU Sensor PArticipants<br />
*** Critical<br/>'''70 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 65 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Passive<br/>'''60 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Ambient Sensor Participants<br />
*** Critical<br/>'''60 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Passive<br/>'''43 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** DDR Sensor Participants<br />
*** Critical<br/>'''81 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
*** Passive<br/>'''62 C''' / 25 C / 35 C / 40 C / 45 C / 50 C / 55 C / 60 C / 61 C / 65 C / 70 C / 75 C / 80 C / 85 C / 90 C / 95 C / 100 C / 105 C / 110 C / 115 C / 120 C / 125 C<br />
<br/><br />
* Scenario Design Power<br />
* Brand String<br/>'''N2805/06''' / N3510/20 / N2910/20 / N2810/15/20 / J2850/2900 / J1850/1900 / J1750/1800<br />
<br />
==== System Component ====<br />
* System Power and Performance (PnP) Configuration<br />
* SoC PnP Setting<br/>'''Auto Detect''' / Disable / Ax Stepping / Bx Stepping<br />
* CFIO/GPIO PnP Setting<br/>'''Disable''' / Enable<br />
* LPC PnP Setting<br/>'''Disable''' / Enable<br />
* FSA ON<br/>'''OFF''' / ON<br />
<br />
==== Debug Configuration ====<br />
<br />
* ACPI Memory Debug Switch<br />
* ACPI Memory Debug<br/>'''Enable''' / Disable<br />
<br/><br />
* ExI<br/>'''Disable''' / Enable<br />
* WITT Configuration<br />
* Enable WITT<br/>'''Disable''' / Enable<br />
* Enable UTS(Uart Test Suite)<br/>'''Disable''' / Enable<br />
<br/><br />
* Lakemore Configuration:<br />
* Memory Allocation Size<br/>'''0 KiB''' / 16000 KiB / 8000 KiB / 1000 KiB / 128 KiB<br />
* PDM/Dfx Setting<br/>'''PDM On''' / Perf Mode / Power Save / Debug Reserved<br />
* PDM Msg Output<br/>'''Disable''' / Main Memory / IO - TBD<br />
<br/><br />
* Enable DB2 Table<br/>'''Enable''' / Disable<br />
<br/><br />
* PM Weights<br/>'''Enable''' / Disable<br />
<br/><br />
* Disable Codec ALC-262<br/>'''NO''' / YES<br />
<br />
=== Secure Boot Configuration ===<br />
Set Secure Boot information<br />
<br />
* Current SecureBoot State<br/>'''Disabled'''<br/>Option Greyed Out<br />
* Attempt Secure Boot<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
* Secure Boot Mode<br/>'''Standard Mode''' / Custom Mode<br />
** Custom Secure Boot Options<br />
*** PK Options<br />
**** Enrolll PK<br />
***** Enroll PK Using File<br />
**** Delete PK<br />
*** KEK Options<br />
**** Enroll KEK<br />
***** Enroll KEK using File<br />
***** Signature GUID<br />
***** Commit Changes and Exit<br />
***** Discard Changes and Exit<br />
**** Delete KEK<br />
*** DB Options<br />
**** Enroll Signature<br />
***** Enroll Signature Using File<br />
***** Signature GUID<br />
***** Commit Changes and Exit<br />
***** Discard Changes and Exit<br />
**** Delete Signature<br />
*** DBX Options<br />
**** Enroll Signature<br />
***** Enroll Signature Using File<br />
***** Signature GUID<br />
***** Commit Changes and Exit<br />
***** Discard Changes and Exit<br />
**** Delete Signature<br />
<br />
=== Network Device List ===<br />
<br />
* Network Device List<br />
* MAC:--:--:--:--:--:--<br />
** Realtek PCIe GBE Family Controller (MAC:--:--:--:--:--:--)<br />
*** Basic information about the Gigabit Ethernet<br />
** IPv4 Network Configuration<br />
*** Configured<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
**** Enable DHCP<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
**** Local IP Address<br/>'''__'''<br />
**** Local NetMask<br/>'''__'''<br />
**** Local IP Gateway<br/>'''__'''<br />
**** Save Changes and Exit<br />
<br />
== Boot Maintenance Manager ==<br />
<br />
=== Boot Options ===<br />
* Go Back To Main Page<br />
==== Add Boot Option ====<br />
There will be a list of bootable options here <br />
<br />
==== Delete Boot Option ====<br />
* EFI Internal Shell<br/>&#91;&nbsp;&#93; / &#91;X&#93;<br />
* EFI USB Device<br/>&#91;&nbsp;&#93; / &#91;X&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Change Boot Order ====<br />
* Change the order<br/>'''&lt;EFI Internal Shell&gt;<br/>&lt;EFI USB Device&gt;'''<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Driver Options ===<br />
* Go Back To Main Page<br />
==== Add Driver Options ====<br />
* Add Driver Option Using File<br />
<br />
==== Delete Driver Option ====<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Change Driver Order ====<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Console Options ===<br />
* Go Back To Main Page<br />
<br />
==== Console Input Device Select ====<br />
* UEFI Path for Serial<br/>'''&#91;X&#93;''' / &#91;&nbsp;&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Console Output Device Select ====<br />
* UEFI Path ACPI Address<br/>'''&#91;X&#93;''' / &#91;&nbsp;&#93;<br />
* UEFI Path Serial Address<br/>'''&#91;X&#93;''' / &#91;&nbsp;&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Console Standard Error Device Select ====<br />
* UEFI Path ACPI Address<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
* UEFI Path Serial Address<br/>'''&#91;&nbsp;&#93;''' / &#91;X&#93;<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Console Output Mode Select ====<br />
* Set Console Output Mode<br/>'''100 x 31''' / 80 x 25<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== COM Attribute Setup Page ====<br />
* Go Back To Main Page<br />
===== Set COM Attributes =====<br />
* Set COM Baud Rate<br/>'''115200''' / 57600 / 38400 / 19200 / 9600 / 7200 / 4800 / 3600 / 2400 / 1800 / 1200 / 600 / 300 / 150 / 134 / 110 / 75 / 50<br />
* Set COM Data Bits<br/>'''8''' / 5 / 6 / 7<br />
* Set COM Parity<br/>'''None''' / Even / Odd / Mark / Space<br />
* Set COM Stop Bits<br/>'''One''' / One and A Half / Two<br />
* Set COM Terminal Type<br/>'''PC_ANSI''' / VT_100 / VT_100_PLUS / VT_UTF8<br />
* Set COM Flow Control<br/>'''None''' / Hardware<br />
<br/><br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
==== Discard Changes and Exit ====<br />
<br />
=== Boot From File ===<br />
* UEFI Path<br />
<br />
=== Set Boot Next Value ===<br />
* Boot Next Value<br/>'''NONE''' / EFI Internal Shell / EFI USB Device<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Set Time Out Value ===<br />
* Auto Boot Time-out<br/>'''&#91;5&#92;''' / Range: 0-65535 seconds. 0 is no wait, 65535 is wait for key press<br />
* Commit Changes and Exit<br />
* Discard Changes and Exit<br />
<br />
=== Reset System ===<br />
<br />
<br />
== KNOWN ISSUES ==<br />
<br />
There are some reports of corruption of the UEFI firmware<br />
<br />
* http://lists.elinux.org/pipermail/elinux-minnowboard/Week-of-Mon-20140721/000203.html<br />
<br />
Symptoms are no display, 2 leds on, and this serial output trace :<br />
<br />
<pre><br />
>>>>SecStartup<br />
>>>>MemoryInit Done<br />
>>>>BdsEntry<br />
</pre><br />
<br />
* http://www.elinux.org/Minnowboard:SPI_Boot_flash : said to apply to Max<br />
* http://www.elinux.org/Minnowboard:Hardware_Revisions<br />
* https://bugzilla.yoctoproject.org/buglist.cgi?list_id=38325&query_format=advanced&bug_status=NEW&bug_status=ACCEPTED&bug_status=IN%20PROGRESS%20DESIGN&bug_status=IN%20PROGRESS%20DESIGN%20COMPLETE&bug_status=IN%20PROGRESS%20IMPLEMENTATION&bug_status=IN%20PROGRESS%20REVIEW&bug_status=REOPENED&bug_status=NEEDINFO&bug_status=WaitForUpstream&component=bsps-meta-minnow</div>Dvharthttps://elinux.org/index.php?title=Calamari_Lure&diff=323654Calamari Lure2014-04-22T23:03:51Z<p>Dvhart: /* Features */</p>
<hr />
<div>= Description =<br />
<gallery><br />
File:Calamari1.jpg|Angled<br />
File:Calamari2.jpg|Side-1<br />
File:Calamari3.jpg|Side-2<br />
File:Calamari4.jpg|Side-3<br />
File:Calamari5.jpg|Side-4<br />
File:Calamari6.jpg|Top<br />
<br />
</gallery><br />
<br />
== General Information ==<br />
The Calamari Lure is designed as a demonstration platform for the MinnowBoardMax<br />
<br />
== Features ==<br />
<br />
* 2 PWM controlled LEDS<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_PWM_00 || LED1 || PWM<br />
|-<br />
| SIO_PWM_11 || LED2 || PWM<br />
|}<br />
<br><br />
* GPIO Output controlled 7 Segment LED display<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| GPIO_S5_2 || Clock || GPIO Output<br />
|-<br />
| LPE_I2S2_DATAIN || Data || GPIO Output<br />
|-<br />
| LPE_I2S2_DATAOUT || Latch || GPIO Output<br />
|-<br />
| LPE_I2S2_FRM || Clear || GPIO Output<br />
|}<br />
<br><br />
* ADC input using a variable resistor slider potentiometer via a SPI based ADC<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_SPI_CS || Chip Select || SPI<br />
|-<br />
| SIO_SPI_DO || Data Out || SPI<br />
|-<br />
| SIO_SPI_DI || Data In || SPI<br />
|-<br />
| SIO_SPI_CLK || Clock || SPI<br />
|}<br />
<br><br />
<br />
* 3 GPIO inputs using a buttons<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| LPE_I2S2_CLK || S1 || GPIO Input<br />
|-<br />
| SIO_UART1_CTS || S2 || GPIO Input<br />
|-<br />
| SIO_UART1_RTS || S3 || GPIO Input<br />
|}<br />
<br><br />
* dual TTL uarts<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_UART1_TX || UART1 TX || UART<br />
|-<br />
| SIO_UART1_RX || UART1 RX || UART<br />
|-<br />
| SIO_UART2_TX || UART2 TX || UART<br />
|-<br />
| SIO_UART2_RX || UART2 RX || UART<br />
|}<br />
<br><br />
* RGB GPIO controlled LED<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| GPIO_S5_0 || RED || GPIO Output<br />
|-<br />
| GPIO_S5_1 || GREEN || GPIO Output<br />
|-<br />
| ILB_8254_SPKR || BLUE || GPIO Output<br />
|}<br />
<br><br />
* I2C EEPROM at 0x50<br />
{| class="wikitable"<br />
|-<br />
! Signal !! Function || PadConf<br />
|-<br />
| SIO_I2C5_DATA || I2C Data || I2C<br />
|-<br />
| SIO_I2C5_CLK || I2C Clock || I2C<br />
|}<br />
<br><br />
<br />
== Reference Material ==<br />
<br />
* [http://www.protostack.com/blog/2011/06/atmega168a-pulse-width-modulation-pwm/ PWM Tutorial]<br />
* [http://conductiveresistance.com/interactive-595-shift-register-simulator/ 595 Tutorial]<br />
* [http://en.wikipedia.org/wiki/Seven-segment_display_character_representations 7 Segment Display Character Mapping]<br />
* [https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iio/adc/mcp320x.c?id=v3.14 MCP320x Linux Kernel Device Driver]<br />
* [https://www.kernel.org/doc/Documentation/spi/spidev SPIDEV - userspace SPI character device driver interface documentation]<br />
* [https://www.kernel.org/doc/Documentation/i2c/dev-interface I2CDEV - userspace I2C character device driver interface documentation]<br />
<br><br />
<br><br />
<br />
= Design =<br />
<br />
== Components ==<br />
<br />
* Single tricolored surface mount RGB LED ([[media:rgb-led-smd.pdf|datasheet]])<br />
* 74HC595 Serial Shift Register ([[media:74hc595.pdf|datasheet]])<br />
* 7 Segment Display ([[media:7seg-display.pdf|datasheet]])<br />
* 10k Slider Potentiometer ([[media:10k-slider.pdf|datasheet]])<br />
* NPN Transistor MMBT2222A ([[media:mmbt2222a.pdf|datasheet]])<br />
* Microchip MCP3004 SPI Based Analog-to-Digital converter ([[media:MCP3004.pdf|datasheet]])<br />
* CAT24C256W I2C based EEPROM ([[media:CAT24C256W.pdf|datasheet]])<br />
* Button<br />
<br />
== Design Files ==<br />
<br />
* [[media:Calamari_Lure_RevX1.pdf|Schematic]]<br />
<br />
== Test Files ==<br />
<br />
* Coming Soon!</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:FAQ&diff=280826Minnowboard:FAQ2013-08-20T16:47:26Z<p>Dvhart: /* 4. Can I access the user switches on the MinnowBoard via the sysfs interface in Linux? */</p>
<hr />
<div>==== 1. Does [http://www.memtest86.com/ Memtest] work on the Minnowboard? ====<br />
<br />
<br />
Ans:- No, not currently. The Memtest software is made for the traditional PC-BIOS environment whereas the Minnowboard has the new [http://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface UEFI] firmware. So, until a new version of Memtest is released for the UEFI, it won't work.<br />
<br />
==== 2. Does the MinnowBoard support [http://en.wikipedia.org/wiki/Port_multiplier SATA port multiplier] functions? ====<br />
<br />
Ans:- Yes, the SATA controller on the Minnowboard does have the hardware support for a SATA port multiplier but there is no software support for it at this time.<br />
<br />
==== 3. Will legacy BIOS support be available on the Minnowboard? ====<br />
<br />
Ans:- No, it will not be available. However, it is possible for a third party to purchase a CSM (Compatibility Support Module) from one of the BIOS vendors (e.g, AMI, Phoenix) and add that as a UEFI module.<br />
<br />
==== 4. Can I access the user switches on the MinnowBoard via the sysfs interface in Linux? ====<br />
<br />
Ans:- Yes.<br />
<br />
Out of the box, the minnowboard_keys driver maps the GPIO buttons to keystrokes via the gpio-keys-polled driver. To access them via sysfs, you must unload the driver and export the GPIO lines:<br />
# modprobe -r minnowboard_keys<br />
# cd /sys/class/gpio<br />
# echo 0 > export<br />
# echo 1 > export<br />
# echo 2 > export<br />
# echo 3 > export<br />
# cat gpio0/value<br />
1<br />
<br />
==== 5. The silkscreen for the RTC battery polarity is incorrect on the MinnowBoard. Will I damage the board if I insert the battery backwards?====<br />
<br />
Ans:- This is known issue for Rev A and Rev A1 boards. No damage will occur if you insert the RTC battery backwards.<br />
<br />
==== 6. Where are the man pages? ====<br />
The manual pages consume roughly 300MB and were not installed in the default Angstrom image. If you want the manual pages, you can get them via the opkg command:<br />
# opkg update<br />
# opkg install man<br />
# opkg list | grep "\-doc"<br />
# opkg install <package>-doc</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:FAQ&diff=280820Minnowboard:FAQ2013-08-20T16:43:27Z<p>Dvhart: Manual page notes</p>
<hr />
<div>==== 1. Does [http://www.memtest86.com/ Memtest] work on the Minnowboard? ====<br />
<br />
<br />
Ans:- No, not currently. The Memtest software is made for the traditional PC-BIOS environment whereas the Minnowboard has the new [http://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface UEFI] firmware. So, until a new version of Memtest is released for the UEFI, it won't work.<br />
<br />
==== 2. Does the MinnowBoard support [http://en.wikipedia.org/wiki/Port_multiplier SATA port multiplier] functions? ====<br />
<br />
Ans:- Yes, the SATA controller on the Minnowboard does have the hardware support for a SATA port multiplier but there is no software support for it at this time.<br />
<br />
==== 3. Will legacy BIOS support be available on the Minnowboard? ====<br />
<br />
Ans:- No, it will not be available. However, it is possible for a third party to purchase a CSM (Compatibility Support Module) from one of the BIOS vendors (e.g, AMI, Phoenix) and add that as a UEFI module.<br />
<br />
==== 4. Can I access the user switches on the MinnowBoard via the sysfs interface in Linux? ====<br />
<br />
Ans:- No.<br />
<br />
==== 5. The silkscreen for the RTC battery polarity is incorrect on the MinnowBoard. Will I damage the board if I insert the battery backwards?====<br />
<br />
Ans:- This is known issue for Rev A and Rev A1 boards. No damage will occur if you insert the RTC battery backwards.<br />
<br />
==== 6. Where are the man pages? ====<br />
The manual pages consume roughly 300MB and were not installed in the default Angstrom image. If you want the manual pages, you can get them via the opkg command:<br />
# opkg update<br />
# opkg install man<br />
# opkg list | grep "\-doc"<br />
# opkg install <package>-doc</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:Hardware_Revisions&diff=269606Minnowboard:Hardware Revisions2013-07-09T20:57:38Z<p>Dvhart: /* Known Hardware Issues */</p>
<hr />
<div>= Revision A =<br />
<br />
== Known Software Issues ==<br />
* GPIO buttons are slow to respond<br />
<br />
<br />
== Known Hardware Issues ==<br />
<br />
* Left/Right Audio channels swapped on line-out jack<br />
** Workaround: edit /etc/asound.conf to swap the channels:<br />
# Swap L/R channels for MinnowBoard Rev A boards<br />
pcm.!default {<br />
type route<br />
slave.pcm "cards.pcm.default"<br />
ttable.0.1 1<br />
ttable.1.0 1<br />
}</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=256058Minnowboard:IssueTracker2013-05-23T15:36:46Z<p>Dvhart: </p>
<hr />
<div>== Yocto Project BSP (and Kernel) Issues ==<br />
These are tracked via the Yocto Project bugzilla:<br />
[https://bugzilla.yoctoproject.org/buglist.cgi?list_id=38448&classification=Yocto%20Project%20Components&query_format=advanced&bug_status=NEW&bug_status=ACCEPTED&bug_status=IN%20PROGRESS%20DESIGN&bug_status=IN%20PROGRESS%20DESIGN%20COMPLETE&bug_status=IN%20PROGRESS%20IMPLEMENTATION&bug_status=IN%20PROGRESS%20REVIEW&bug_status=REOPENED&bug_status=NEEDINFO&bug_status=WaitForUpstream&component=bsps-meta-minnow&product=BSPs Bugzilla MinnowBoard BSP Query]<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
These are tracked via the Yocto Project Bugzilla: [https://bugzilla.yoctoproject.org/buglist.cgi?list_id=38449&classification=Yocto%20Project%20Components&query_format=advanced&bug_status=NEW&bug_status=ACCEPTED&bug_status=IN%20PROGRESS%20DESIGN&bug_status=IN%20PROGRESS%20DESIGN%20COMPLETE&bug_status=IN%20PROGRESS%20IMPLEMENTATION&bug_status=IN%20PROGRESS%20REVIEW&bug_status=REOPENED&bug_status=NEEDINFO&bug_status=WaitForUpstream&component=minnowboard-firmware&component=minnowboard-uefi-firmware&product=Firmware MinnowBoard Firmware Query]<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=254672Minnowboard:IssueTracker2013-05-19T06:50:46Z<p>Dvhart: </p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
# '''No way to resume from suspend'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* It isn't clear yet how this should work. There are only a few wake lines available on the board. I'm not sure if the PWR or RST buttons should cause a wake. Something to try is WOL, USB wake, and the E6XX resume well GPIOs SUS[...].<br />
# '''Audio mixer controls are inconsistent'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* On one boot alsamixer reports Headphones and Front, on subsequent boots things like Master, PCM, the digital switches and more appear. I suspect something is still not quite right with the VERB presented from firmware, but more investigation is required.<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Add PCI SIDs to all PCI devices'''<br />
#* Priority: CRITICAL<br />
#* Status: New<br />
#* Reporter: dvhart<br />
#* dvhart: To properly identify the PCI devices as being on the MinnowBoard, we need to specify this in the PCI Subsystem IDs (SVID,SID). We are working on getting the IDs acquired, but we can use temporary ones for developing the drivers while we wait for the IDs to materialize.<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add EFI VAR for EG20TEthernetAddr0'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
# '''USB keyboard not detected on reboot from Angstrom image'''<br />
#* Priority: Medium<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
#* When rebooting from Angstrom ($ reboot) if there is no autoboot target setup, the firmware will drop to the shell, but the USB keyboard isn't detected. Using the serial console works and the keyboard and mouse both work once booted back up into Angstrom.<br />
=== RESOLVED ===<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=252200Minnowboard:IssueTracker2013-05-14T21:20:57Z<p>Dvhart: /* UEFI Firmware Issues */</p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
* none listed currently<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Add PCI SIDs to all PCI devices'''<br />
#* Priority: CRITICAL<br />
#* Status: New<br />
#* Reporter: dvhart<br />
#* dvhart: To properly identify the PCI devices as being on the MinnowBoard, we need to specify this in the PCI Subsystem IDs (SVID,SID). We are working on getting the IDs acquired, but we can use temporary ones for developing the drivers while we wait for the IDs to materialize.<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add EFI VAR for EG20TEthernetAddr0'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
# '''USB keyboard not detected on reboot from Angstrom image'''<br />
#* Priority: Medium<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
#* When rebooting from Angstrom ($ reboot) if there is no autoboot target setup, the firmware will drop to the shell, but the USB keyboard isn't detected. Using the serial console works and the keyboard and mouse both work once booted back up into Angstrom.<br />
=== RESOLVED ===<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=250634Minnowboard:IssueTracker2013-05-10T16:54:31Z<p>Dvhart: /* UEFI Firmware Issues */</p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
* none listed currently<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Add PCI SIDs to all PCI devices'''<br />
#* Priority: CRITICAL<br />
#* Status: New<br />
#* Reporter: dvhart<br />
#* dvhart: To properly identify the PCI devices as being on the MinnowBoard, we need to specify this in the PCI Subsystem IDs (SVID,SID). We are working on getting the IDs acquired, but we can use temporary ones for developing the drivers while we wait for the IDs to materialize.<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add EFI VAR for EG20TEthernetAddr0'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
=== RESOLVED ===<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=250628Minnowboard:IssueTracker2013-05-10T16:52:02Z<p>Dvhart: /* UEFI Firmware Issues */</p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
* none listed currently<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Add PCI SIDs to all PCI devices'''<br />
#* Priority: CRITICAL<br />
#* Status: New<br />
#* Reporter: dvhart<br />
#* dvhart: To properly identify the PCI devices as being on the MinnowBoard, we need to specify this in the PCI Subsystem IDs (SVID,SID). We are working on getting the IDs acquired, but we can use temporary ones for developing the drivers while we wait for the IDs to materialize.<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
# '''Add EFI VAR for EG20TEthernetAddr0'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=250622Minnowboard:IssueTracker2013-05-10T16:49:40Z<p>Dvhart: /* UEFI Firmware Issues */</p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
* none listed currently<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Add PCI SIDs to all PCI devices'''<br />
#* Priority: CRITICAL<br />
#* Status: New<br />
#* Reporter: dvhart<br />
#* dvhart: To properly identify the PCI devices as being on the MinnowBoard, we need to specify this in the PCI Subsystem IDs (SVID,SID). We are working on getting the IDs acquired, but we can use temporary ones for developing the drivers while we wait for the IDs to materialize.<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=250292Minnowboard:IssueTracker2013-05-10T01:05:38Z<p>Dvhart: Add PCI IDs to Firmware issues.</p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
* none listed currently<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Add PCI SIDs to all PCI devices'''<br />
#* Priority: CRITICAL<br />
#* Status: New<br />
#* Reporter: dvhart<br />
#* dvhart: To properly identify the PCI devices as being on the MinnowBoard, we need to specify this in the PCI Subsystem IDs (SVID,SID). We are working on getting the IDs acquired, but we can use temporary ones for developing the drivers while we wait for the IDs to materialize.<br />
<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=250286Minnowboard:IssueTracker2013-05-09T20:54:27Z<p>Dvhart: Adding some hardware bits until the other issue trackers are up. Restoring iterms inadvertantly erased between edits.</p>
<hr />
<div>== Linux Kernel Issues ==<br />
<br />
* none listed currently<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
* none listed currently<br />
<br />
== Angstrom Image Issues ==<br />
<br />
* none listed currently<br />
<br />
== MinnowBoard X3 Issues ==<br />
<br />
* none listed currently<br />
<br />
== Testing Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== Training Lure Issues ==<br />
<br />
* none listed currently<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=250280Minnowboard:IssueTracker2013-05-09T20:47:59Z<p>Dvhart: </p>
<hr />
<div>== MinnowBoard X3 Issues ==<br />
<br />
== Testing Lure Issues ==<br />
<br />
== Training Lure Issues ==<br />
<br />
== UEFI Firmware Issues ==<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=249746Minnowboard:IssueTracker2013-05-08T16:26:39Z<p>Dvhart: EFI boot path and efifb enablement</p>
<hr />
<div>== UEFI Firmware Issues ==<br />
# '''Firmware must detect SATA and MMC by default and enable EFIfb'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: koen<br />
#* dvhart: From past experience, this should work like this: On first boot the firmware scans SATA, MMC, and USB (in that order) and automatically boot the standard EFI payload (EFI/BOOT/BOOTIA32.EFI). I think that path changes in the spec for fixed media like SSDs. On the subsequent boot, it will attempt to boot only that path. If that fails, I believe it drops to the shell, you run the commands to get your payload ready, then "exit", select from the options to boot, and that choice should be selected on the next boot. Lee please comment.<br />
<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:IssueTracker&diff=249506Minnowboard:IssueTracker2013-05-07T21:55:32Z<p>Dvhart: Initial Issue Tracker</p>
<hr />
<div>Until the final production infrastructure is up and running, this page will serve as a collaboration area for the various teams developing the MinnowBoard.<br />
<br />
Issue format (copy and paste from source view):<br />
# '''Issue description'''<br />
#* Priority (CRITICAL|HIGH|MEDIUM|LOW)<br />
#* Status (NEW|ACCEPTED|NEEDINFO|RESOLVED)<br />
#* Reporter dvhart<br />
#* Comment 1<br />
#* Comment 2 ...<br />
<br />
'''Note:''' While tables are possible with the WIKI, entry is '''very''' error-prone. Please use the documented format.<br />
<br />
== UEFI Firmware Issues ==<br />
# '''mPCIe not visible from OS'''<br />
#* Priority: CRITICAL<br />
#* Status: NEW<br />
#* Reporter: danders<br />
<br />
# '''Zero 0x0-0x1000 per compatibility documentation'''<br />
#* Priority: CRITICAL<br />
#* Status: RESOLVED<br />
#* Reporter: dvhart<br />
#* Firmware now zeroes the page. Linux now has improved heuristics to detect bogus data.<br />
<br />
# '''GOP driver needs to set GPIO state appropriately based on LVDS_PRESENT signal'''<br />
#* Priority: CRITICAL<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Set DMI_BOARD_NAME to “MinnowBoard” per our previous SMBIOS discussion'''<br />
#* Priority: HIGH<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* VENDOR strings will be "Circuitco"<br />
#* Completed, pending next firmware release<br />
<br />
# '''Random? Boot failures. One ends in “PROGRESS CODE: V2020004 I0” over serial'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Lee unable to reproduce<br />
<br />
# '''Board doesn't boot after poweroff, must cut/restore power'''<br />
#* Priority: MEDIUM<br />
#* Status: NEW<br />
#* Reporter: dvhart<br />
<br />
# '''Ensure the intel-hda pci device config data is populated, as well as the VERB table'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Audio device now works with MSI disabled. Need information from OS to determine why MSIs are being enabled.<br />
<br />
# '''Verify we are using ACPI 5.0, boot messages only confirm ACPI 2.0'''<br />
#* Priority: MEDIUM<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* How do we tell which version of AML is passed to the OS?<br />
<br />
# '''USB keyboard prevents serial console from receiving input (no hub in use)'''<br />
#* Priority: MEDIUM<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
#* General USB 1.0 issues are known and being worked.<br />
<br />
# '''I/O space for WDT uninitialized (can't use the E6xx watchdog)'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Linux boot message: Firmware Bug: ACPI: BIOS _OSI(Linux) query ignored'''<br />
#* Priority: LOW<br />
#* Status: ACCEPTED<br />
#* Reporter: dvhart<br />
<br />
# '''Add SSDT describing the GPIO present on the board (pending input from ACPI teams)'''<br />
#* Priority: LOW<br />
#* Status: NEEDINFO<br />
#* Reporter: dvhart<br />
#* Not going to happen before release. Maybe not at all. The existing drivers don't work this way and duplicating them for Minnow doesn't really make sense.<br />
<br />
== Linux Kernel Issues ==<br />
<br />
== Yocto Project BSP Issues ==<br />
<br />
== Angstrom Image Issues ==</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:Beacon_Lure&diff=249254Minnowboard:Beacon Lure2013-05-06T18:58:52Z<p>Dvhart: /* 7 Segment Display */</p>
<hr />
<div>= Description =<br />
<br />
Beacon Lure is a small accessory board that is primarily intended for use with the [http://www.minnowboard.org MinnowBoard] however it can be wired into any development platform that supports GPIOs<br />
<br />
[[File:Beacon_lure.png|240px]] [[File:Beacon_lure_connected.png|300px]]<br />
<br />
= Features =<br />
<br />
* Single tricolored RGB LED ([[media:rgb-led.pdf|datasheet]])<br />
* WS2801 RGB LED PWM controller ([[media:ws2801.pdf|datasheet]])<br />
* 74HC595 Serial Shift Register ([[media:74hc595.pdf|datasheet]])<br />
* 7 Segment Display ([[media:7seg-display.pdf|datasheet]])<br />
* I2C EEPROM ([[media:cat24aa01.pdf|datasheet]])<br />
<br />
= References =<br />
<br />
* [http://www.protostack.com/blog/2011/06/atmega168a-pulse-width-modulation-pwm/ PWM Tutorial]<br />
* [http://conductiveresistance.com/interactive-595-shift-register-simulator/ 595 Tutorial]<br />
* [http://en.wikipedia.org/wiki/Seven-segment_display_character_representations 7 Segment Display Character Mapping]<br />
<br />
= Design =<br />
<br />
* [[media:beacon_lure_revb.pdf|Schematic]]<br />
<br />
= Interface =<br />
<br><br />
<br />
== 7 Segment Display ==<br />
TBD<br />
<br><br />
<br />
== RGB LED ==<br />
<br />
<br><br />
<br />
= Software =<br />
== 7 Segment Display ==<br />
* [[media:Do-7seg.sh|Example shell script (Bash or Ash)]]<br />
* Python Example<br />
* C example<br />
* Kernel Driver Example<br />
<br />
== RGB LED ==<br />
=== Shell (Bash or Ash) ===<br />
*[[media:beacon-color.sh|Example shell script to set an arbitrary color]]<br />
*[[media:Do-red.sh|Example shell script to turn on RED LED]]<br />
*[[media:Do-green.sh|Example shell script to turn on GREEN LED]]<br />
*[[media:Do-blue.sh|Example shell script to turn on BLUE LED]]<br />
<br />
== Angstrom ==<br />
<br />
* TBD<br />
<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: MinnowBoard Expansion Boards]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=File:Do-7seg.sh&diff=249248File:Do-7seg.sh2013-05-06T18:57:15Z<p>Dvhart: Dvhart uploaded a new version of &quot;File:Do-7seg.sh&quot;: Remove the "function" keyword so it can work in bash or ash.</p>
<hr />
<div></div>Dvharthttps://elinux.org/index.php?title=Minnowboard:Beacon_Lure&diff=249242Minnowboard:Beacon Lure2013-05-06T18:54:21Z<p>Dvhart: These are not bash specific</p>
<hr />
<div>= Description =<br />
<br />
Beacon Lure is a small accessory board that is primarily intended for use with the [http://www.minnowboard.org MinnowBoard] however it can be wired into any development platform that supports GPIOs<br />
<br />
[[File:Beacon_lure.png|240px]] [[File:Beacon_lure_connected.png|300px]]<br />
<br />
= Features =<br />
<br />
* Single tricolored RGB LED ([[media:rgb-led.pdf|datasheet]])<br />
* WS2801 RGB LED PWM controller ([[media:ws2801.pdf|datasheet]])<br />
* 74HC595 Serial Shift Register ([[media:74hc595.pdf|datasheet]])<br />
* 7 Segment Display ([[media:7seg-display.pdf|datasheet]])<br />
* I2C EEPROM ([[media:cat24aa01.pdf|datasheet]])<br />
<br />
= References =<br />
<br />
* [http://www.protostack.com/blog/2011/06/atmega168a-pulse-width-modulation-pwm/ PWM Tutorial]<br />
* [http://conductiveresistance.com/interactive-595-shift-register-simulator/ 595 Tutorial]<br />
* [http://en.wikipedia.org/wiki/Seven-segment_display_character_representations 7 Segment Display Character Mapping]<br />
<br />
= Design =<br />
<br />
* [[media:beacon_lure_revb.pdf|Schematic]]<br />
<br />
= Interface =<br />
<br><br />
<br />
== 7 Segment Display ==<br />
TBD<br />
<br><br />
<br />
== RGB LED ==<br />
<br />
<br><br />
<br />
= Software =<br />
== 7 Segment Display ==<br />
* [[media:Do-7seg-ash.sh|Example shell script (Bash or Ash)]]<br />
* Python Example<br />
* C example<br />
* Kernel Driver Example<br />
<br />
== RGB LED ==<br />
=== Shell (Bash or Ash) ===<br />
*[[media:beacon-color.sh|Example shell script to set an arbitrary color]]<br />
*[[media:Do-red.sh|Example shell script to turn on RED LED]]<br />
*[[media:Do-green.sh|Example shell script to turn on GREEN LED]]<br />
*[[media:Do-blue.sh|Example shell script to turn on BLUE LED]]<br />
<br />
== Angstrom ==<br />
<br />
* TBD<br />
<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: MinnowBoard Expansion Boards]]<br />
[[Category: CircuitCo]]</div>Dvharthttps://elinux.org/index.php?title=File:Beacon-color.sh&diff=249236File:Beacon-color.sh2013-05-06T18:53:14Z<p>Dvhart: Example shell script to set the LED to an arbitrary color using decimal RGB values:
# Set to cyan:
./beacon-color.sh 0 255 255</p>
<hr />
<div>Example shell script to set the LED to an arbitrary color using decimal RGB values:<br />
<br />
# Set to cyan:<br />
./beacon-color.sh 0 255 255</div>Dvharthttps://elinux.org/index.php?title=Minnowboard:Beacon_Lure&diff=249230Minnowboard:Beacon Lure2013-05-06T18:51:21Z<p>Dvhart: Bash and ash fixups</p>
<hr />
<div>= Description =<br />
<br />
Beacon Lure is a small accessory board that is primarily intended for use with the [http://www.minnowboard.org MinnowBoard] however it can be wired into any development platform that supports GPIOs<br />
<br />
[[File:Beacon_lure.png|240px]] [[File:Beacon_lure_connected.png|300px]]<br />
<br />
= Features =<br />
<br />
* Single tricolored RGB LED ([[media:rgb-led.pdf|datasheet]])<br />
* WS2801 RGB LED PWM controller ([[media:ws2801.pdf|datasheet]])<br />
* 74HC595 Serial Shift Register ([[media:74hc595.pdf|datasheet]])<br />
* 7 Segment Display ([[media:7seg-display.pdf|datasheet]])<br />
* I2C EEPROM ([[media:cat24aa01.pdf|datasheet]])<br />
<br />
= References =<br />
<br />
* [http://www.protostack.com/blog/2011/06/atmega168a-pulse-width-modulation-pwm/ PWM Tutorial]<br />
* [http://conductiveresistance.com/interactive-595-shift-register-simulator/ 595 Tutorial]<br />
* [http://en.wikipedia.org/wiki/Seven-segment_display_character_representations 7 Segment Display Character Mapping]<br />
<br />
= Design =<br />
<br />
* [[media:beacon_lure_revb.pdf|Schematic]]<br />
<br />
= Interface =<br />
<br><br />
<br />
== 7 Segment Display ==<br />
TBD<br />
<br><br />
<br />
== RGB LED ==<br />
<br />
<br><br />
<br />
= Software =<br />
== 7 Segment Display ==<br />
* [[media:Do-7seg-ash.sh|Example shell script (Bash or Ash)]]<br />
* Python Example<br />
* C example<br />
* Kernel Driver Example<br />
<br />
== RGB LED ==<br />
=== Shell (Bash or Ash) ===<br />
*[[media:beacon-color.sh|Example shell script to set an arbitrary color]]<br />
*[[media:Do-red.sh|Example Bash shell script to turn on RED LED]]<br />
*[[media:Do-green.sh|Example Bash shell script to turn on GREEN LED]]<br />
*[[media:Do-blue.sh|Example Bash shell script to turn on BLUE LED]]<br />
<br />
== Angstrom ==<br />
<br />
* TBD<br />
<br />
<br />
[[Category: MinnowBoard]]<br />
[[Category: MinnowBoard Expansion Boards]]<br />
[[Category: CircuitCo]]</div>Dvhart