Difference between revisions of "R-Car/Upstream-Kernel-Release-Highlights"
< R-Car
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(→v4.12) |
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== v4.12 == | == v4.12 == | ||
− | + | Preliminary analysis based on v4.12-rc2 | |
=== R-Car Gen3 ARM64 Based SoCs === | === R-Car Gen3 ARM64 Based SoCs === |
Revision as of 09:15, 25 May 2017
Contents
Upstream Kernel Release Highlights for Renesas 32-Bit ARM and ARM64 Based SoCs
v4.12
Preliminary analysis based on v4.12-rc2
R-Car Gen3 ARM64 Based SoCs
Corrections
- r8a7795: Correct SATA device size to 2MiB for r8a7795 SoC
Cleanups
- Drop superfluous status update for frequency override from all r8a779[56] boards
- Tidyup Audio-DMAC channel for DVC for r8a7795 SoC
- Remove unit-address and reg from integrated cache on r8a779[56] SoCs
- Drop _clk suffix from X12 clock node name for r8a7795 SoC
Enhancements
- Add all Cortex-A53 and Cortex-A57 CPU cores to r8a7796 SoC
- Add Cortex-A53 CPU cores to r8a7795 SoC
- Update memory node to 4 GiB map on h3ulcb board
- Upgrade to PSCI v1.0 to support Suspend-to-RAM on r8a779[56] SoCs
- Add SCIF1 (DEBUG1) to r8a7796/salvator-x board
- Add all SCIF and HSCIF nodes with DMA enabled to r8a7796 SoC
- Set drive-strength for ravb pins for r8a7795/salvator-x board
- Enable gigabit ethernet on r8a779[56]/salvator-x boards
- Enable I2C for DVFS device r8a779[56]/salvator-x boards
- Add reset control properties for r8a779[56]
R-Car Gen2 and Gen 1, and other 32-Bit ARM Based SoCs
Corrections
- Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
- Correct Z clock for r8a7792 SoC
- Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
- Correct ethernet clock parent on r7s72100 SoC
Cleanups
- Drop superfluous status update for frequency override on various boards
- Always use status "okay" to enable devices on porter board
- Add INTC-SYS clock to device tree of various SoCs
- Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
- Remove unit-address and reg from integrated cache on various SoCs
- Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
- Fix SCIFB0 dmas indentation on r8a774[35] SoCs
- Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements
- Enable rtc r7s72100/genmai board
- Add Z2 and DU clock for r8a7794 SoC
- Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
- Add reset control properties for r8a774[35] SoCs
- Add watchdog timer to r7s72100 SoC
- Update sdhi clock bindings on r7s72100 SoC
v4.11
R-Car Gen3 ARM64 Based SoCs
Cleanups
- Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs — they are enabled as appropriate in board DT files
- Tidyup audma definition order on r8a7795 SoC
- Add missing power-domains property for SATA on r8a7795 SoC
Enhancements
- Add PWM, and sound MIX and CTU support to r8a7795 SoC
- Add CAN, CAN FD and all MSIOF nodes to r8a7796 SoC
- Use Gen 3 fallback binding for i2c, msiof, PCIE and USB2 phy
- Enable Ethernet and 4 GiB memory on r8a7796/salvator-x board
- Add r8a7796/salvator-x board part number to bindings
- Link ARM GIC to clock and clock domain on r8a779[56] SoCs
- Add thermal support on r8a779[56] SoCs
- Add MIX/CTU support as per support present in DT for r8a7796
R-Car Gen2 and Gen 1, and other 32-Bit ARM Based SoCs
Cleanups
- Add device node for PRR to SoCs where it was missing
- Move RST node before SYSC node where it was incorrectly placed
- Use Gen 2 fallback bindings for I2C, IIC, MSIOf and USB2 phy
- Use SoC-specific compat string for MMCIF where it was missing
Enhancements
- Add da9063 PMIC device node for system restart to gose board
- Allow booting secondary CPU cores in debug mode
- Add power-domains to mmcif on r7s72100 SoC
- Add OSTM to rskrza1/r7s72100
- Link ARM GIC to clock and clock domain on r8a774[35] SoCs
v4.10
R-Car Gen3 ARM64 Based SoCs
Corrections
- Provide sd0_uhs node
Cleanups
- Remove FCP SoC-specific compatible strings
Enhancements
- Enable On-board eMMC
- Enable SDHI 0 & 3 with UHS
- Add SYS-DMAC controller nodes to r8a7796 SoC
- Populate EXTALR on r8a7796/salvator-x board; used by watchdog
- Add DU LVDS output endpoint on r8a7795/salvator-x board
- Add bias setting for USB1 pins on r8a7795/salvator-x board
- Add device nodes for PRR
- Add m3ulcb board
- Enable I2C on r8a7796/salvator-x board
- Enable SDHI0 on h3ulcb board
R-Car Gen2 and Gen 1, and other 32-Bit ARM Based SoCs
Corrections
- Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
- Correct hsusb parent clock on r8a7794 SoC
- Correct PFC names for DU on alt board
Cleanups
- Removed Z clock from r8a7794 SoC; it is not present in hardware
- Use generic pinctrl properties in SDHI nodes in gose board
- Correct W=1 dtc warnings on r8a7794 SoC
- Correct DU reg property on r8a7779 SoC
- Correct SCIFB reg properties to cover all registers
- Consolidate R8A7743 and R8A779[234] machine definitions
Enhancements
- Configure pinmuxing for the DU0 input clock on the Marzen board
- Enable VIN 0 - 2 on r8a7793 SoC
- Enable HDMI input on Koelsch and Lager boards
- Enable SDHI1 on rskrza1 board
- Add MMCIF nodes to r7s72100 SoC
- Add MSIOF clocks to r8a7792 SoC
- Enable UHS for SDHI 0 & 1 on koelsch and alt boards
- Select errata 798181 for SoCs with CA15 cores
- Identify SoC and register with the SoC bus
- Add device nodes for PRR
- Add r8a7745 SoC and sk-rzg1e board
- Add r8a7743 SoC and sk-rzg1m board
- Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards
Older Kernel Releases
TBD