SBC8118

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Embest Mini8118 Processor Card Bold text

Top-View Bottom-View Features   Mechanical Parameters Dimensions: 57.0 mm x 44.5 mm (6 layer PCB design) Working temperature: -30~70 Celsius Humidity Range: 20% ~ 90% Power Consumption: 200mA @ 5V

Processor TI AM1808 ARM9 microprocessor- 375-MHz ARM926EJ-S RISC MPU, also supports 456MHz operation- ARM926EJ-S Core - ARM9 Memory Architecture - Enhanced Direct-Memory-Access Controller 3 (EDMA3) - 128K-Byte On-chip Memory - 1.8V or 3.3V LVCMOS IOs (except for USB and DDR2 interfaces) - Two External Memory Interfaces - Three Configurable 16550 type UART Modules - LCD Controller - Two Serial Peripheral Interfaces (SPI) Each With Multiple Chip-Selects - Two MMC/SD Card Interface with Secure Data I/O (SDIO) Interfaces Memory 128MByte Mobile DDR2 128MByte NAND Flash (on the rear of the board) Expansion Interfaces and Signals Routed to Pins Two 2.0mm space 3*27-pin dip connectors- TFT LCD Interface (support 16-bpp parallel RGB Interface LCD)- Two 8-bit SD (BT.656), Single 16-bit or Single Raw (8-/10-/12-bit) Video Capture Channels - JTAG Debugger Interface - USB 1.1 OHCI (Host) With Integrated PHY (USB1) - USB 2.0 OTG Port With Integrated PHY (USB0, Support High-/Full-/Low-Speed) - Two SPI interfaces with multiple chip selects; - Two inter-integrated circuit (I2C) Bus interfaces - Three UART interfaces (each with RTS and CTS); - A 10/100 Mb/s Ethernet MAC (EMAC) with a Management Data Input/Output (MDIO) module; - A multichannel buffered serial ports (McBSP) with FIFO buffers; - Four 64-bit general-purpose timers each configurable (one configurable as watchdog); - A configurable 16-bit host port interface (HPI) ; - A enhanced high-resolution pulse width modulator (eHRPWM) peripherals; - A 32-bit enhanced capture (eCAP) module peripherals which can be configured as capture inputs or auxiliary pulse width modulator (APWM) outputs; - GPIO (Up to 9 banks of 16 pins of general-purpose input/output with programmable interrupt/event generation modes, multiplexed with other peripherals)


General Description Embest Mini8118 processor card is based on TI’s AM1808 ARM9 application processor which is powered by 375-MHz ARM926EJ-S RISC MPU core. The board has 128bytes mobile DDR2 and 128Mbytes NAND Flash on board and uses two 2.0mm space 3*27-pin dip connectors to bring out many hardware peripheral signals and GPIOs from CPU. The board is ideal for your next embedded design which you intend to use the AM1808 for industry applications. Embest also designed an expansion board for integration of the Mini8118 processor card. The single board computer is called SBC8118. The board has exposed many other hardware interfaces including Wi-Fi/Bluetooth, Serial port, LCD/TSP, LVDS, USB Host/OTG, Ethernet, Audio, SATA, Camera, TF card, etc. It has one 14-pin JTAG interface which can be used with XDS100v2 emulator available from Embest. Embest also offers 4.3” and 7” LCD display with touch screen as optional modules for this board. Functional Block Diagram

Dimensions

Mini8118 Dimensions

Two 2.0mm space 3*27-pin dip connectors Embest Mini8118 processor card is connected to carrier board via two 2.0mm space 3*27-pin DIP connectors. The connector marked in red below is CON1, table 1-1 described the pin signals of CON1 connector.


  Table 1-1 CON1 Pin Signal Description 1 LCD_D0 LCD data bus 2 LCD_D1 LCD data bus 3 LCD_D2 LCD data bus 4 LCD_D3 LCD data bus 5 LCD_D4 LCD data bus 6 LCD_D5 LCD data bus 7 LCD_D6 LCD data bus 8 LCD_D7 LCD data bus 9 LCD_D8 LCD data bus 10 LCD_D9 LCD data bus 11 LCD_D10 LCD data bus 12 LCD_D11 LCD data bus 13 LCD_D12 LCD data bus 14 LCD_D13 LCD data bus 15 LCD_D14 LCD data bus 16 LCD_D15 LCD data bus 17 DGND GND 18 DGND GND 19 DGND GND 20 DGND GND 21 SATA_100M_CLKN 22 DGND GND 23 DGND GND 24 SATA_100M_CLKP 25 DGND GND 26 DGND GND 27 uP_SATA_RXP SATA receive data(positive) 28 DGND GND 29 DGND GND 30 uP_SATA_RXN SATA receive data (negative) 31 DGND GND 32 DGND GND 33 uP_SATA_TXN SATA transmit data (negative) 34 DGND GND 35 DGND GND 36 uP_SATA_TXP SATA transmit data (positive) 37 DGND GND 38 MMC_SD1_D0 MMC_SD1 data 39 MMC_SD1_CLK MMC_SD1 clock 40 LCD_AC_ENB_CSN LCD AC bias enable chip select 41 MMC_SD1_CMD MMC_SD1 command 42 MMC_SD1_D2 MMC_SD1 data 43 LVDS_EN 44 MMC_SD1_D1 MMC_SD1 data 45 MMC_SD1_D3 MMC_SD1 data 46 +3P3V_DEV_EN 47 LCD_EN 48 LCD_PWM 49 LCD_VSYNC LCD vertical sync 50 LCD_HSYNC LCD horizontal sync 51 LCD_PCLK LCD pixel clock 52 MII_TXD1 EMAC MII transmit data 53 MII_TXD2 EMAC MII transmit data 54 MII_TXD3 EMAC MII transmit data 55 MII_COL EMAC MII Collision detect input 56 MII_TXD0 EMAC MII transmit data 57 MII_TXEN EMAC MII Transmit enable output 58 DGND GND 59 MII_TXCLK EMAC MII Transmit clock input 60 AIC_WCLK 61 AIC_DIN 62 AIC_BCLK 63 +3P3V 64 AIC_MCLK/UART1_CTSN 65 MII_MDIO 66 DEEPSLEEP DEEPSLEEP power control output 67 USER_MENU 68 MII_RXER EMAC MII receive error input 69 MII_RXD0 EMAC MII receive data 70 User_LED_1 71 MII_RXDV EMAC MII receive data valid input 72 MII_MDC 73 XEINT16 74 MII_RXD3 EMAC MII receive data 75 MII_CRS EMAC MII carrier sense input 76 DGND GND 77 MII_RXCLK EMAC MII receive clock input 78 MII_RXD2 EMAC MII receive data 79 PG_400MS 80 VCORE_EN 81 MII_RXD1 EMAC MII receive data

The connector marked in red below is CON2, table 1-2 described the pin signals of CON2 connector.


Table 1-2

CON2 Pin Signal 1 CAM_PCLK_A0 Capture channel 0 input clock 2 CAM_D0 capture data bus 3 CAM_D1 capture data bus 4 CAM_D2 capture data bus 5 CAM_D3 capture data bus 6 CAM_D4 capture data bus 7 CAM_D5 capture data bus 8 CAM_D6 capture data bus 9 CAM_D7 capture data bus 10 CAM_D8 capture data bus 11 CAM_D9 capture data bus 12 CAM_D10 capture data bus 13 CAM_D11 capture data bus 14 CAM_D12 capture data bus 15 CAM_D13 capture data bus 16 CAM_D14 capture data bus 17 CAM_D15 capture data bus 18 Up_CAM_STR 19 CAM_XCLKB_A0 20 CAM_PCLK_A1 capture channel 1 input clock 21 DGND GND 22 Up_RESETOUTn 23 uP__TDI JTAG test data input 24 uP_TDO JTAG test data output 25 uP_TMS JTAG test mode select 26 uP_TCK JTAG test clock 27 uP_TRSTn JTAG test logic reset 28 uP_EMU0 29 uP_EMU1 30 uP_RTCK 31 uP_USB1_DP 32 uP_USB0_ID 33 DGND GND 34 uP_USB1_DM USB1 PHY data minus 35 DGND GND 36 DGND GND 37 uP_USB0_DP USB0 PHY data plus 38 DGND GND 39 DGND GND 40 uP_USB0_DM USB0 PHY data minus 41 TP_SPI1_SCSn1 SPI1 chip selects 42 uP_SPI1_SOM1 SPI1 data slave-out-master-in 43 uP_SPI1_SIMO SPI1 data slave-in-master-out 44 uP_SPI1_ENAN SPI1 enable 45 TP_BUSY EMIFA address bus 46 uP_SPI1_CLK 47 uP_NMIn 48 DGND GND 49 DGND GND 50 I2C0_SCL I2C0 serial clock 51 I2C0_SDA I2C0 serial data 52 UART2_RXD UART2 receive data 53 MMC_CD 54 DGND GND 55 UART2_TXD UART2 transmit data 56 SD0_DATA1 57 SD0_DATA0 58 UART1_TXD UART1 transmit data 59 SD0_CLK 60 SD0_CMD 61 UART1_RXD UART1 receive data 62 SD0_DATA3 63 SD0_DATA2 64 WLAN_WAKE 65 WLAN_RESET 66 WLAN_HOST_WAKE 67 BT_HOST_WAKE 68 BT_WAKE 69 BT_RST 70 AUDIO_EN 71 LVDS_DEN 72 +1P2V_RTC 73 +3P3V_STB 74 AUDIO_MCLK_ENn 75 uP_RESETn_KEY 76 +3P3V_STB 77 DGND GND 78 USB0_VBUS 79 UART2_RTS UART2 ready-to-send output 80 UART1_RTSn UART1 ready-to-send output 81 WL_BT_REG_ON

Software Features OS Item Remark Linux BIOS x-loader NAND / ONENAND MMC / SD FAT u-boot NAND / ONENAND MMC/SD FAT NET Kernel Linux-2.6.33 Supports ROM/CRAM/EXT2/EXT3/FAT/NFS/ JFFS2/UBIFS file systems Device Driver Serial port, RTC, Ethernet, Nand Flash, LCD, Touch screen, TF card, USB OTG, USB Host, SATA, Audio input/output, key, LED WinCE BIOS x-loader NAND / ONENAND MMC / SD FAT u-boot NAND / ONENAND MMC / SD FAT NET Device Driver Serial port, RTC, Ethernet, Nand Flash, LCD, Touch screen, TF card, USB OTG, USB Host, Audio input/output, key, LED Power Management (backlight, battery, Sleep/Wakeup, PWM, ADC) APP application module Flash Player plug-in and Flash player