https://elinux.org/api.php?action=feedcontributions&user=Ryu2014&feedformat=atomeLinux.org - User contributions [en]2024-03-29T15:41:14ZUser contributionsMediaWiki 1.31.0https://elinux.org/index.php?title=R-Car/Boards/Salvator-XS&diff=550586R-Car/Boards/Salvator-XS2021-04-20T07:35:56Z<p>Ryu2014: </p>
<hr />
<div>{{TOC right}}<br />
<br />
= Introduction =<br />
<br />
This is the Wiki for the Renesas Salvator-XS (Salvator-X 2nd version) board, which is available in different versions, depending on the actual SiP mounted:<br />
* RTP0RC7795SIPB0012S (with R-Car H3 ES2.0),<br />
* RTP0RC7796SIPB0012S (with R-Car M3-W),<br />
* RTP0RC7796SIPB0012SA5A (with R-Car M3-W+, aka R-Car M3-W ES3.0),<br />
* RTP0RC77965SIPB012S (with R-Car M3-N).<br />
Refer to the [[R-Car]] page for information about Renesas' R-Car SoC family.<br />
<br />
= Serial Console =<br />
<br />
Use a micro-USB cable to connect to "Debug Serial 0".<br />
Serial settings are 115200 8N1.<br />
<br />
Unfortunately the CP2102 USB-to-UART bridges on Salvator-XS boards have the same serial strings (0001 resp. 00002 for Debug Serial 0 resp. 1), complicating identifying consoles on multiple boards.<br />
If you have multiple boards connected to the same host and you want stable serial ports, there are two options:<br />
# Refer to the ports using the symbolic links under /dev/serial/by-path/, instead of the /dev/ttyUSB* names,<br />
# Program the ports' serial strings to your liking (e.g. salvator-xs-1884-debug0) using the tool at https://github.com/DiUS/cp210x-cfg, and refer to the ports using the symbolic links under /dev/serial/by-id/, instead of the /dev/ttyUSB* names.<br />
<br />
= Booting Linux =<br />
<br />
* Kernel config: defconfig<br />
* Kernel image: arch/arm64/boot/Image<br />
* DTB: arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dtb (for R-Car H3)<br />
* DTB: arch/arm64/boot/dts/renesas/r8a77960-salvator-xs.dtb (for R-Car M3-W)<br />
* DTB: arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dtb (for R-Car M3-W+)<br />
* DTB: arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb (for R-Car M3-N)<br />
<br />
U-Boot boot command:<br />
<pre><br />
tftpboot 0x50000000 Image<br />
tftpboot 0x58000000 r8a77951-salvator-xs.dtb (for R-Car H3)<br />
tftpboot 0x58000000 r8a77960-salvator-xs.dtb (for R-Car M3-W)<br />
tftpboot 0x58000000 r8a77961-salvator-xs.dtb (for R-Car M3-W+)<br />
tftpboot 0x58000000 r8a77965-salvator-xs.dtb (for R-Car M3-N)<br />
booti 0x50000000 - 0x58000000<br />
</pre><br />
<br />
Kernel v5.5 and older used different DTB names:<br />
* DTB: arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb (for R-Car H3)<br />
* DTB: arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb (for R-Car M3-W)<br />
* DTB: arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb (for R-Car M3-N)<br />
<br />
= Suspend-to-RAM =<br />
<br />
== PSCI System Suspend ==<br />
<br />
The system can be suspended by triggering a PSCI System Suspend:<br />
<pre><br />
echo mem > /sys/power/state<br />
</pre><br />
<br />
Caveats:<br />
* Before you can use the above, you must configure the PMIC for DDR Backup Mode first, using the command below, followed by switching SW23 off:<br />
<pre><br />
echo on > /sys/bus/i2c/drivers/bd9571mwv/*/bd9571mwv-regulator*/backup_mode<br />
</pre><br />
* On kernels up to and including v4.18, the "backup_mode" sysfs file doesn't exist. Hence you must use i2cset instead, and repeat this operation after each wake-up:<br />
<pre><br />
i2cset -f -y 7 0x30 0x20 0x0F<br />
</pre><br />
* PSCI System Suspend supports wake-up by PMIC only. Switch SW23 on to resume the system.<br />
<br />
== Suspend-to-Idle ==<br />
<br />
If you want to suspend the system, and wake up through other wake-up sources,<br />
you must use Suspend-to-Idle instead of PSCI System Suspend.<br />
<br />
The system can be suspended ("frozen") using:<br />
<pre><br />
echo freeze > /sys/power/state<br />
</pre><br />
<br />
Alternatively (since v4.10), you can configure the system to use Suspend-to-Idle by default:<br />
<pre><br />
echo s2idle > /sys/power/mem_sleep<br />
</pre><br />
<br />
After that, you can suspend the system using the standard:<br />
<pre><br />
echo mem > /sys/power/state<br />
</pre><br />
<br />
== Wake-Up Sources ==<br />
<br />
Suspend-to-Idle supports the following wake-up sources:<br />
<br />
* gpio-keys: Not enabled in the upstream kernel due to sharing of GPIOs between switches and LEDs, but see [[#Remote Control|Remote Control]] below.<br />
* ravb (Ethernet): Configure using one of:<br />
<pre><br />
ethtool -s eth0 wol g # Enable wake on MagicPacket<br />
ethtool -s eth0 wol d # Disable<br />
</pre><br />
Wake-up by sending a MagicPacket from another system using:<br />
<pre><br />
wakeonlan <mac-address> | <hostname> | <ip-address> # <hostname> or <ip-address> must be in /etc/ethers<br />
</pre><br />
* sh-sci (Serial): Disabled by default<br />
* usb: Disabled by default<br />
<br />
= Remote Control =<br />
<br />
{| class="wikitable"<br />
|-<br />
|'''Operation'''<br />
|'''Signal A'''<br />
|'''Pin A'''<br />
|'''Signal B'''<br />
|'''Pin B'''<br />
|'''Connector needed'''<br />
|'''Comments'''<br />
|-<br />
|Reset<br />
|#MRB/SYSRSTn<br />
|EXIO-D pin 66<br />
|GND<br />
|EXIO-D pin 58<br />
|Samtec QTE-020 or -040<br />
|<br />
|-<br />
|Wake-Up<br />
|IRQ1n/GP2_01<br />
|EXIO-D pin 50<br />
|GND<br />
|EXIO-D pin 46<br />
|Samtec QTE-020 or -040<br />
|Needs ''arm64: dts: salvator-common: Enable GP2_1 for wake-up'' from [https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/board-farm renesas-drivers#topic/board-farm]<br />
|-<br />
|ACC OFF<br />
|#RSTB/EX_PWRONn<br />
|EXIO-D pin 68<br />
|D5.0V<br />
|CN7 pin 4<br />
|Samtec QTE-020 or -040, and 5¼ HDD power<br />
|Pull high '''via 10K resistor''' to power off (47K to D12.0V might be better, cfr. [[R-Car/Boards/Ebisu|Ebisu]], but is untested)<br />
|}<br />
<br />
= An Experiment in U-Boot for Cortex-R7 =<br />
R-Car Gen3 currently boots up using Cortex-A cores<br />
<br />
<pre><br />
[Boot ROM(CA57)] --> [BL2(CA57)] --> [U-Boot(CA57)] --> [Linux kernel(CA57]<br />
</pre><br />
<br />
R-Car Gen3 has two Cortex-R7 cores and it could be used for booting as well.<br />
This experiment attempts to boot R-Car Gen3 up using a<br />
Cortex-R7 core. The boot sequence of this experiment will be like this:<br />
<br />
<pre><br />
[Boot ROM(CR7)] --> [CR7 Loader(CR7)] --> [U-Boot(CR7)] --> [RTOS(CR7)]<br />
`--> [BL2(CA57)] --> [U-Boot(CA57)]<br />
</pre> <br />
<br />
To do this, a simple tarball called ''rcg3-cr7-uboot''([[File:Rcg3-cr7-uboot-20210420.tar.bz2]]) is provided.<br />
''rcg3-cr7-uboot'' package includes patches related to Cortex-R7 and provides a makefile to help to build sources.<br />
<br />
This section describes how to build sources and test it on the Salvator-XS.<br />
<br />
== Prerequisite ==<br />
''rcg3-cr7-uboot'' uses the Renesas Cortex-R7 Loader package. You should contact Renesas<br />
to get ''Cortex-R7 Loader'' since this is a proprietary package. After procuring ''Cortex-R7 Loader'',<br />
these two files, ''CortexR7_Loader_20191220.tar.gz'' and ''Dummy_RTOS_0615.tar.gz'', must be copied into<br />
the ''tarballs'' directory.<br />
<br />
== Compilation ==<br />
<br />
=== With an installed toolchain ===<br />
If you already have an development environment for Cortex-R7, you could use<br />
it. If you don't have a toolchain, you could get it here<br />
[[https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm Cortex-RM Toolchain]].<br />
''Git'' must be installed because ''rcg3-cr7-uboot'' uses it for patching and<br />
managing code. In addition, you should install ''bison'' and ''flex'' to build U-Boot.<br />
To build source, type it.<br />
<pre><br />
make all<br />
</pre><br />
Generated files needed will be copied into the ''artifacts'' directory.<br />
<br />
=== With Docker ===<br />
You could use Docker to build sources as well. The built files will be<br />
located in the ''artifacts'' directory.<br />
<pre><br />
make docker-build<br />
</pre><br />
<br />
== Flashing ==<br />
<br />
After building sources, a few files generated by ''rcg3-cr7-uboot'' must be written into the HyperFlash<br />
memory on the System in Package.<br />
<br />
# '''bootparam_sa0.srec''': It has information used by an Initial Program Loader resided in the ''BootROM''<br />
# '''cr7_loader.srec''': It's a SREC-formatted blob file which contains a binary. The binary, Renesas CR7 Loader, is a some kind of Secondary Program Loader running on Cortex-R7.<br />
# '''cert_header_sa3.srec''': It has information about the text and sector address of U-Boot to be loaded by ''CR7 Loader''.<br />
# '''u-boot.srec''': It' a SREC-formatted blob file which contains an U-Boot binary.<br />
<br />
In here, ''MiniMonitor'' is used for flashing them. Please consult<br />
[[https://elinux.org/R-Car/Boards/H3SK Sterter Kit]] for how to use ''MiniMonitor''.<br />
<br />
Please note that the configuration of DIP switches is different between Stater Kit and Salvator-XS.<br />
Here is information about DIP switches for Salvator-XS<br />
<br />
* To run ''MiniMonitor''<br />
<pre><br />
SW1[all] = [On]<br />
SW2[all] = [On]<br />
SW3 = Off<br />
SW10[1:8] = [On, On, On, On, On, Off, On, On]<br />
</pre><br />
<br />
* To enable HyperFlash memory<br />
<pre><br />
SW1[all] = [Off]<br />
SW2[all] = [Off]<br />
SW3 = On<br />
</pre><br />
<br />
* To use Cortex-R7 and HyperFlash memory<br />
<pre><br />
SW1[all] = [Off]<br />
SW2[all] = [Off]<br />
SW3 = On<br />
SW10[1:8] = [Off, Off, On, On, On, On, Off, Off]<br />
</pre><br />
<br />
Please following the instruction of ''MiniMointor''. <br />
This is messages of ''MiniMonitor'' when writing ''bootparam_sa0.srec''<br />
<br />
<pre><br />
R-Car Gen3 MiniMonitor H3ES2.0/M3ES1.1 V0.04 2017.02.28<br />
Work Memory : SystemRAM (H'E6328000-H'E632FFFF) <br />
Board Name : Salvator<br />
Product Code : R-Car H3 ES20 .00 <br />
<br />
>xls2<br />
===== Qspi/HyperFlash writing of Gen3 Board Command =============<br />
Load Program to Spiflash<br />
Writes to any of SPI address.<br />
Please select,FlashMemory. <br />
1 : QspiFlash (U5 : S25FS128S)<br />
2 : QspiFlash Board (CN3: S25FL512S)<br />
3 : HyperFlash (SiP internal)<br />
Select (1-3)>3<br />
SW1 SW2 All OFF! Setting OK? (Push Y key)<br />
SW3 ON! Setting OK? (Push Y key)<br />
READ ID OK.<br />
Program Top Address & Qspi/HyperFlash Save Address <br />
===== Please Input Program Top Address ============<br />
Please Input : H'E6320000<br />
<br />
===== Please Input Qspi/HyperFlash Save Address ===<br />
Please Input : H'0<br />
Work RAM(H'50000000-H'53FFFFFF) Clear....<br />
please send ! ('.' & CR stop load)<br />
SPI Data Clear(H'FF) Check :H'00000000-0003FFFF,Clear OK?(y/n)<br />
H'00000000-0003FFFF Erasing..Erase Completed <br />
SAVE SPI-FLASH....... complete!<br />
<br />
======= Qspi/HyperFlash Save Information =================<br />
SpiFlashMemory Stat Address : H'00000000<br />
SpiFlashMemory End Address : H'00000E67<br />
===========================================================<br />
<br />
><br />
</pre><br />
<br />
This is information about text addresses of binaries and HyperFlash sector addresses.<br />
{| class="wikitable"<br />
|-<br />
! Filename !! Program Top Address !! Flash Save Address !! Source<br />
|-<br />
| '''bootparam_sa0.srec''' || 0xE6320000 || 0x00000000 || CR7 Loader<br />
|-<br />
| '''cr7_loader.srec''' || 0xE6304000 || 0x00040000 || CR7 Loader<br />
|-<br />
| '''cert_header_sa3.srec''' || 0xE6320000 || 0x000C0000 || CR7 Loader<br />
|-<br />
| '''u-boot.srec''' || 0x51000000 || 0x00740000 || U-Boot<br />
|}<br />
<br />
Please note that BL2 and BL31 of Arm Trusted Firmware must be rewritten because BL2 is replaced<br />
with CR7 Loader.<br />
{| class="wikitable"<br />
|-<br />
! Filename !! Program Top Address !! Flash Save Address !! Source<br />
|-<br />
| '''bl2-salvator-x.srec''' || 0xE6304000 || 0x00100000 || Renesas Yocto<br />
|-<br />
| '''bl31-salvator-x.srec''' || 0x44000000 || 0x001C0000 || Renesas Yocto<br />
|}<br />
<br />
== Using U-Boot for Cortex-R7 ==<br />
If all binaries have successfully been flashed <br />
and SW1, SW2, SW3 and SW10 DIP switches are configured to enable Cortex-R7 and HyperFlash memory,<br />
<pre><br />
SW1[all] = [Off]<br />
SW2[all] = [Off]<br />
SW3 = On<br />
SW10[1:8] = [Off, Off, On, On, On, On, Off, Off]<br />
</pre><br />
the U-Boot prompt would be appeared on your serial terminal after powering up a Salvator-XS board.<br />
<br />
<pre><br />
NOTICE: R-Car Gen3 Initial Program Loader(CR7) Rev.1.0.14a<br />
NOTICE: Built : 04:12:33, Apr 13 2021<br />
NOTICE: PRR is R-Car H3 Ver2.0<br />
NOTICE: LCM state is CM<br />
NOTICE: BL2: DDR3200(rev.0.39)<br />
NOTICE: BL2: [COLD_BOOT]<br />
NOTICE: BL2: DRAM Split is 4ch<br />
NOTICE: BL2: QoS is default setting(rev.0.21)<br />
NOTICE: BL2: DRAM refresh interval 1.95 usec<br />
NOTICE: BL2: Periodic Write DQ Training<br />
NOTICE: R-Car Gen3 tcm loader(CR7)<br />
NOTICE: Normal boot(CR7)<br />
NOTICE: RTOS load address=0x51000000 RTOS image size=0x00400000<br />
<br />
<br />
U-Boot 2020.01-cr7-0.1-00006-g409eea96c3 (Apr 13 2021 - 04:12:39 +0000)<br />
<br />
CPU: Renesas Electronics R8A7795 rev 2.0<br />
Model: Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+<br />
DRAM: 896 MiB<br />
Bank #0: 0x048000000 - 0x07fffffff, 896 MiB<br />
<br />
MMC: sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2<br />
Loading Environment from MMC... OK<br />
In: serial@e6e88000<br />
Out: serial@e6e88000<br />
Err: serial@e6e88000<br />
Net: eth0: ethernet@e6800000<br />
Hit any key to stop autoboot: 3<br />
(CR7) =><br />
</pre><br />
<br />
=== Speeding up a development using TFTP ===<br />
<br />
In short, this is an example of setting up U-Boot to use TFTP.<br />
<pre><br />
(CR7) => setenv ethact 'ravb'<br />
(CR7) => setenv ethaddr '2e:09:0a:00:a3:41'<br />
(CR7) => setenv ipaddr '192.168.0.200'<br />
(CR7) => setenv serverip '192.168.0.14'<br />
</pre><br />
<br />
After setting up U-Boot, you could download a file like this:<br />
<pre><br />
(CR7) => tftp 0x48000000 dummy_rtos.bin<br />
Using ethernet@e6800000 device<br />
TFTP from server 192.168.0.14; our IP address is 192.168.0.200<br />
Filename 'dummy_rtos.bin'.<br />
Load address: 0x48000000<br />
Loading: *####<br />
2.8 MiB/s<br />
done<br />
Bytes transferred = 49152 (c000 hex)<br />
</pre><br />
<br />
=== Running a binary ===<br />
U-Boot could run a binary by directly setting up processor's registers. This is<br />
an example how to run the Dummy RTOS of Renesas using U-Boot.<br />
<pre><br />
(CR7) => setenv rtos_boot_addr 0x48000000<br />
(CR7) => tftp 0x48000000 dummy_rtos.bin<br />
Using ethernet@e6800000 device<br />
TFTP from server 192.168.0.14; our IP address is 192.168.0.200<br />
Filename 'dummy_rtos.bin'.<br />
Load address: 0x48000000<br />
Loading: *####<br />
2.8 MiB/s<br />
done<br />
Bytes transferred = 49152 (c000 hex)<br />
(CR7) => bootrtos<br />
Running RTOS: boot address = 0x48000000<br />
<br />
NOTICE: R-Car Gen3 Dummy RTOS(CR7)<br />
NOTICE: PRR is R-Car H3 ES2.0<br />
NOTICE: MIDR = (0x410fc171)<br />
NOTICE: CBAR = (0xf0000000)<br />
NOTICE: CPSR = (0x600001d3)<br />
NOTICE: Dummy RTOS boot end<br />
</pre><br />
<br />
The '''bootrtos''' command has been added to U-Boot for Cortex-R7. '''bootrtos''' refers<br />
the ''rtos_boot_addr'' environment variable so you must set up this variable<br />
according to the text address of a binary that you want to run.<br />
<br />
=== Bringing up Cortex-A ===<br />
The '''caup''' command has been added to U-Boot for Cortex-R7 as well to bring up Cortex-A.<br />
If you execute the '''caup''' command, U-Boot for Cortex-A would be appeared.<br />
<pre><br />
(CR7) => caup<br />
CPU0 will be powered up (base addr = 0x00000000e6304000)<br />
CPU0 has been powered up.We don't need to power it up.<br />
(CR7) => <br />
<br />
U-Boot 2015.04 (Oct 23 2018 - 17:56:46)<br />
<br />
CPU: Renesas Electronics R8A7795 rev 2.0<br />
Board: Salvator-X<br />
I2C: ready<br />
DRAM: 3.9 GiB<br />
Bank #0: 0x048000000 - 0x07fffffff, 896 MiB<br />
Bank #1: 0x500000000 - 0x53fffffff, 1 GiB<br />
Bank #2: 0x600000000 - 0x63fffffff, 1 GiB<br />
Bank #3: 0x700000000 - 0x73fffffff, 1 GiB<br />
<br />
MMC: sh-sdhi: 0, sh-sdhi: 1, sh-sdhi: 2<br />
In: serial<br />
Out: serial<br />
Err: serial<br />
Net: ravb<br />
Hit any key to stop autoboot: 3<br />
=> version<br />
<br />
U-Boot 2015.04 (Oct 23 2018 - 17:56:46)<br />
aarch64-poky-linux-gcc (GCC) 7.3.0<br />
GNU ld (GNU Binutils) 2.29.1.20170915<br />
=><br />
</pre><br />
From here, you could boot up Linux or do something else.<br />
<br />
There is an issue regarding the serial port. Arm Trusted Firmware by Renesas<br />
doesn't seem to enable the clock of the serial port so TF-A’s messages aren't<br />
displayed after transiting from Cortex-R to Cortex-A.</div>Ryu2014https://elinux.org/index.php?title=File:Rcg3-cr7-uboot-20210420.tar.bz2&diff=550581File:Rcg3-cr7-uboot-20210420.tar.bz22021-04-20T07:05:33Z<p>Ryu2014: U-Boot for R-Car Gen3 Cortex-R7</p>
<hr />
<div>== Summary ==<br />
U-Boot for R-Car Gen3 Cortex-R7</div>Ryu2014