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Driver, Control the Green Media LED and J5


The GPIO registers are quite fickle things. Not only are they for the Media LED and J5 header, they also manage the IRQs and Peripheral Chip selects. Hitting a wrong bit in Linux will cause problems, kernel panics, total lockups, bad things, 'plagues of locusts', you get the idea. When using the PPC405 _gpio driver below(or the 405_ocp_gpio driver in DENX 2.4, use a mask of 0xFFC00000, that way you don't manage to hit something you really don't want to.

Playing with the Media LED

The Media LED on the DHT-Walnut is wired to the processor by the GPIO pins. However its behind a 74VHC14 Schmitt Inverter. So you have to send it low in order to turn it on. This top section only covers the Media LED and the U-Boot ROM Monitor.

Memory Locations

0xef600700 is the memory location of the GPIO output register. It's 4 bytes wide. It turns on and off the GPIO pins on the PPC405GP.

0xef600704 is the location of the Tri-State register. Also 4 bytes wide. Controls if the GPIO pin is active when high.

0xef600718 is the location of the Open Drain register. Also 4 bytes wide. Controls if the GPIO pin is an open drain or active output.

0xef60071c is the location of the GPIO Input register. Also 4 bytes wide. The state of each pin is reflected in the correspondig value in this register. (synchronized with OPBClk)

Playing with the LED

By having all the bits in the Tri-State register high and the Output register all low, The pins are driven low. Because the Media LED is behind the inverter it glows when low. Setting it high in the Output register will turn it off.

Example using U-Boot 1.1.4

Setting the Tri-State Register to drive all usable GPIOs.

=> nm 0xef600704
ef600704: 00000000 ? ffc00000
ef600704: ffc00000 ?

The LED should be lit now as its pin is driven low.

Turning the LED on and off with the Output Register

=> nm 0xef600700
ef600700: 00000000 ? 20000000  //LED should be off.
ef600700: 20000000 ? 00000000  //LED goes on.
ef600700: 00000000 ?

The J5 Header

The J5 header located to the left of the RAM slot actually has 9 GPIO pins wired to it. GPIOs 1 to 9 to be exact. That header also has the Power and Media LEDs wired to it, so using the first 2 pins will look awkward if your bit-banging to say a SD/MMC card or LCD display. The J5 header has the following layout. As things are developed they will be added.


pin addr function
GPIO3 0x100 I/O
GPIO4 0x080 I/O
GPIO5 0x040 I/O
GPIO6 0x020 I/O
GPIO7 0x010 I/O
GPIO8 0x008 I/O
GPIO9 none GND

kernel Module

it will compile with 2.6.16/2.6.22, still under development ... email me

gpio attached app


15-06-2009: the idea has been stared 3 days ago, the stuff is under development


15-06-2009: the idea has been stared 3 days ago, the stuff is under development