Flameman/eltek

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Info

The board has been made be synergy microsystem as V462 (dual processor) in V460 Series It seems the board+bsp+vxworks has been sold as "EUROCOM 27xxx"

Overview

• CPU: dual 33 MHz 68060 processors
• ram: 64 Mbytes, DRAM
• lan: Ethernet
• interface: Graphics, SCSI-2, VME 32/64?
• OS: comes with OS-9, LynxOS, pSOS+, PDOS, VxWorks

Memory

• Memory is provided on a piggyback module allowing it to be easily upgraded
• Up to 4 Mbytes of FLASH
• Supports ELTEC's LEB mezzanine bus

Working scheme

is this system (hw-2x68060/vxworks)s.m.p. or a.m.p. ?

• a.m.p. http://en.wikipedia.org/wiki/Asymmetric_multiprocessing
• s.m.p. http://en.wikipedia.org/wiki/Symmetric_multiprocessing
• n.u.m.a. there is also an other working schema, called "numa", seeFlameman/numa, useful with a great amount of cpu (cpu >> 8)

it seems that the dual-CPU V460 is featuring a symmetrical architecture allowing the two 68060 CPUs to operate as either tightly-coupled coprocessors sharing the same operating system and peripherals or as two independent CPUs running separate operating systems across separate I/O channels.

If this info is right it should be possible to assign different interrupt level schemes to each CPU via a programmable interrupt control register. In all of these possible arrangements, the dual CPU V460 Series can provide full multi-ported memory access by both CPUs, the VMEbus, and both EZ-bus modules with varying levels of memory protection as required.

power needed

V460 model (50 MHz, 8 MB RAM)

• +5.0v ±5% = 6.4 amps (typical)
• -12.0v ±5% = 30 mA

vme backplane

!!!warning!!!

Pin row B of the P2 backplane is defined 
by VMEbus specifications and is bussed 
across the entire backplane. Pin rows A 
and C are user configured and, if con– 
nected at all, are normally connected to 
adjacent slots via wirewrap or special ca- 
bles. 
Because the P2 pinout may vary between 
backplanes or even slots in the same 
backplane, DO NOT INSTALL the V460 
Series  into a system  slot whose P2 
backplane is not compatible with the 
V460 Series’ P2 pin-out. Failure to 
observe this warning can cause the 
complete destruction of many on-board 
components and also voids the product 
warranty. 
The V460 Series pin-out meets standard 
VME specifications for row B, but rows A 
and C will vary according to the EZ-bus 
daughter module installed. Daughter 
board pinouts are shown in the 
associated daughter module manual. If 
no daughter module is present, P2 back- 
plane rows A and C are defined as no- 
connects. 
For a complete list of the V460 Series P2 
assignments, see the VMEbus connectors 
(P1-P2) chapter in Section 7. 

Bootstrap

On V460 Series dual-68060 models, the following boot architecture is used:

• CPU-X executes from EPROM0 at 0xFE000000 to 0xFE0FFFFF
• CPU-Y executes from EPROM1 at 0xFE400000 to 0xFE4FFFFF or 0xFD000000 to 0xFDFFFFFF

except for the first 3 fetches in boot state in which CPU-X fetches from PROM0 and CPU-Y fetches from PROM1 either 68060 can execute from either or both of the EPROMs.