Difference between revisions of "Minnowboard:MinnowMaxCoreboot"

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(Add "Building without TXE/SPI descriptor" section)
 
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| style="background-color: #E8E8E8;" width="100%" | <br/><br/><span style="color: red;">'''NOTICE:'''</span> This page is no longer being actively maintained here.  Please refer to [http://wiki.minnowboard.org/Coreboot http://wiki.minnowboard.org/Coreboot] for the latest information.<br/><br/><br/>
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This page gives a step by step guide to building coreboot for the Minnowboard Max.
 
This page gives a step by step guide to building coreboot for the Minnowboard Max.
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__toc__
  
 
= Requirements =
 
= Requirements =
  
 
* gcc
 
* gcc
 +
* g++
 
* git
 
* git
 
* make
 
* make
 
* ncurses-dev
 
* ncurses-dev
 +
* flex
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* bison
  
 
= Get sources and tools =
 
= Get sources and tools =
 
NOTE: for simplicity, put all downloads and items extracted into the same directory.  
 
NOTE: for simplicity, put all downloads and items extracted into the same directory.  
 
=== Coreboot ===
 
=== Coreboot ===
* git clone http://review.coreboot.org/p/coreboot
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git clone http://review.coreboot.org/p/coreboot
* cd coreboot
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cd coreboot
* git submodule update --init --checkout
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git submodule update --init --checkout
* git checkout b9a0809faeeef67e46cda17cf8f7a839c6fe614c
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git checkout 7effaa4c02d974b59bd86307a54cefb7bb046a3a
* Download [http://www.elinux.org/images/c/cd/Minnowboard_Max_Coreboot_config.txt|config config]
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* Download [http://www.elinux.org/images/c/cd/Minnowboard_Max_Coreboot_config.txt config]
  
=== FSP ===
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=== Intel Firmware Support Package (FSP) ===
* Download [http://downloadcenter.intel.com/DownloadManager.aspx?lang=eng&httpDown=http://downloadmirror.intel.com/23720/eng/BAY_TRAIL_FSP_KIT.tgz FSP archive]
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* Download:
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** [http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-e3800-fsp-g3-windows-download.html Windows]
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** [http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-e3800-fsp-g3-linux-download.html Linux]
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** Archive Links:
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*** [http://downloadcenter.intel.com/download/24496 Intel® FSP for Intel® Atom™ Processor E3800 Series]
 
* extract from archive
 
* extract from archive
 
* follow instructions in Readme_Extract to extract FSP
 
* follow instructions in Readme_Extract to extract FSP
  
=== Binary Configuration Tool ===
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= Setup =
* Download [http://downloadcenter.intel.com/DownloadManager.aspx?lang=eng&httpDown=http://downloadmirror.intel.com/23622/eng/bct-3.1.2-x86_64.fc14.tar.gz BCT archive]
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=== TXE and SPI descriptor ===
* extract archive from archive
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First build a coreboot utility called ifdtool that's located within the coreboot directory
* extract from archive
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cd coreboot/util/ifdtool
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make
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cd ../../../
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Download the original firmware binary [http://firmware.intel.com/sites/default/files/MinnowBoard.MAX_.X64.078.R02.bin_.zip here]
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unzip -d maxfirmware MinnowBoard.MAX_.X64.078.R02.bin_.zip
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cd maxfirmware
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Run ifdtool to extract the TXE and SPI descriptor from the firmware image
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../coreboot/util/ifdtool/ifdtool -x MinnowBoard.MAX.X64.078.R02.bin
  
=== TXE and SPI descriptor ===
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You should now have 4 files starting with flashregion_
* ???????
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Link flashregion_0_flashdescriptor.bin to descriptor.bin
* Not yet available. See [[Minnowboard:MinnowMaxCoreboot#Building without TXE/SPI descriptor|Building without TXE/SPI descriptor]] section below for a possible workaround.
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ln -s flashregion_0_flashdescriptor.bin descriptor.bin
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Link flashregion_1_bios.bin to txe.bin
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ln -s flashregion_1_bios.bin txe.bin
  
= Setup =
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*Ignore the other two flashregion files as they won't be used
=== FSP ===
 
* cd bct
 
* ./bct --bin ../BAY_TRAIL_FSP_KIT/FSP/BAYTRAIL_FSP_GOLD_002_10-JANUARY-2014.fd  --absf ../coreboot/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf --bout ../minnowboard-max.fsp
 
** If you have a single core Minnowboard Max, change minnowmax_2gb.absf to minnowmax_1gb.absf
 
** DO NOT USE THE GUI. THE GUI DOES NOT WORK ON ALL LINUX DISTROS AND IS NOT NECESSARY FOR THIS.
 
* cd ..
 
  
 
=== Coreboot ===
 
=== Coreboot ===
* cd coreboot
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cd coreboot
* in src/soc/intel/fsp_baytrail/Kconfig line 127, change 'string' to 'string "ME PATH"'
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* in src/soc/intel/fsp_baytrail/Kconfig line 75, change default value of SMM_TSEG_SIZE from '0x100000' to '0x800000'
* make menuconfig
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make menuconfig
 
* load provided config
 
* load provided config
 
* save config to .config
 
* save config to .config
 
* If you have a single core Minnowboard Max, change "Mainboard" -> "Memory SKU to build" to 1GB
 
* If you have a single core Minnowboard Max, change "Mainboard" -> "Memory SKU to build" to 1GB
* Set "Chipset" -> "ME PATH" to the directory containing TXE and SPI descriptor
 
  
 
= Building =
 
= Building =
* make crossgcc
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make crossgcc-x64 crossgcc-i386
* make
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make
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* The firmware produced is build/coreboot.rom
  
 
= Building without TXE/SPI descriptor =
 
= Building without TXE/SPI descriptor =
This section has not been tested, but should work.
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make menuconfig
* make menuconfig
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* Set Chipset -> Include the TXE to No
** Set Chipset -> Include the TXE to No
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make crossgcc-x64 crossgcc-i386
** Set Mainboard -> ROM chip size to 4 MB
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make
* make crossgcc
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* When flashing the firmware, only flash the last 3MB of the 8 MB image onto the last 3MB of the chip
* make
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** Example command using flashrom and a dediprog: echo 00500000:007fffff coreboot > regions.txt ; sudo flashrom -p dediprog -l regions.txt -i coreboot -w coreboot.rom
* When flashing the firmware, put the 4 MB image on the second half of the 8 MB chip, being careful not to overwrite the first half.
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* If you accidentally overwrite the first half, you will need to reflash the original firmware, which is available [https://uefidk.com/content/minnowboard-max here].
 +
 
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[[Category:MinnowBoard]]

Latest revision as of 11:34, 5 November 2015



NOTICE: This page is no longer being actively maintained here. Please refer to http://wiki.minnowboard.org/Coreboot for the latest information.


This page gives a step by step guide to building coreboot for the Minnowboard Max.

Requirements

  • gcc
  • g++
  • git
  • make
  • ncurses-dev
  • flex
  • bison

Get sources and tools

NOTE: for simplicity, put all downloads and items extracted into the same directory.

Coreboot

git clone http://review.coreboot.org/p/coreboot
cd coreboot
git submodule update --init --checkout
git checkout 7effaa4c02d974b59bd86307a54cefb7bb046a3a

Intel Firmware Support Package (FSP)

Setup

TXE and SPI descriptor

First build a coreboot utility called ifdtool that's located within the coreboot directory

cd coreboot/util/ifdtool
make
cd ../../../

Download the original firmware binary here

unzip -d maxfirmware MinnowBoard.MAX_.X64.078.R02.bin_.zip
cd maxfirmware

Run ifdtool to extract the TXE and SPI descriptor from the firmware image

../coreboot/util/ifdtool/ifdtool -x MinnowBoard.MAX.X64.078.R02.bin

You should now have 4 files starting with flashregion_ Link flashregion_0_flashdescriptor.bin to descriptor.bin

ln -s flashregion_0_flashdescriptor.bin descriptor.bin

Link flashregion_1_bios.bin to txe.bin

ln -s flashregion_1_bios.bin txe.bin
  • Ignore the other two flashregion files as they won't be used

Coreboot

cd coreboot
  • in src/soc/intel/fsp_baytrail/Kconfig line 75, change default value of SMM_TSEG_SIZE from '0x100000' to '0x800000'
make menuconfig
  • load provided config
  • save config to .config
  • If you have a single core Minnowboard Max, change "Mainboard" -> "Memory SKU to build" to 1GB

Building

make crossgcc-x64 crossgcc-i386
make
  • The firmware produced is build/coreboot.rom

Building without TXE/SPI descriptor

make menuconfig
  • Set Chipset -> Include the TXE to No
make crossgcc-x64 crossgcc-i386
make
  • When flashing the firmware, only flash the last 3MB of the 8 MB image onto the last 3MB of the chip
    • Example command using flashrom and a dediprog: echo 00500000:007fffff coreboot > regions.txt ; sudo flashrom -p dediprog -l regions.txt -i coreboot -w coreboot.rom
  • If you accidentally overwrite the first half, you will need to reflash the original firmware, which is available here.