Difference between revisions of "R-Car/Boards/Salvator-XS"

From eLinux.org
Jump to: navigation, search
(Add Salvator-XS based on M3-W)
 
(19 intermediate revisions by one other user not shown)
Line 1: Line 1:
 
{{TOC right}}
 
{{TOC right}}
  
= Renesas Salvator-XS =
+
= Introduction =
  
== Introduction ==
+
This is the Wiki for the Renesas Salvator-XS (Salvator-X 2nd version) board, which is available in different versions, depending on the actual SiP mounted:
 
+
* RTP0RC7795SIPB0012S (with R-Car H3 ES2.0),
This is the Wiki for the Renesas R-Car H3 ES2.0 and M3-W Salvator-X 2nd version board (RTP0RC7795SIPB0012S resp. RTP0RC7796SIPB0012S).
+
* RTP0RC7796SIPB0012S (with R-Car M3-W),
 +
* RTP0RC7796SIPB0012SA5A (with R-Car M3-W+, aka R-Car M3-W ES3.0),
 +
* RTP0RC77965SIPB012S (with R-Car M3-N).
 
Refer to the [[R-Car]] page for information about Renesas' R-Car SoC family.
 
Refer to the [[R-Car]] page for information about Renesas' R-Car SoC family.
  
== Serial Console ==
+
= Serial Console =
  
 
Use a micro-USB cable to connect to "Debug Serial 0".
 
Use a micro-USB cable to connect to "Debug Serial 0".
 
Serial settings are 115200 8N1.
 
Serial settings are 115200 8N1.
  
== Booting Linux ==
+
Unfortunately the CP2102 USB-to-UART bridges on Salvator-XS boards have the same serial strings (0001 resp. 00002 for Debug Serial 0 resp. 1), complicating identifying consoles on multiple boards.
 +
If you have multiple boards connected to the same host and you want stable serial ports, there are two options:
 +
# Refer to the ports using the symbolic links under /dev/serial/by-path/, instead of the /dev/ttyUSB* names,
 +
# Program the ports' serial strings to your liking (e.g. salvator-xs-1884-debug0) using the tool at https://github.com/DiUS/cp210x-cfg, and refer to the ports using the symbolic links under /dev/serial/by-id/, instead of the /dev/ttyUSB* names.
 +
 
 +
= Booting Linux =
  
 
   * Kernel config: defconfig
 
   * Kernel config: defconfig
 
   * Kernel image: arch/arm64/boot/Image
 
   * Kernel image: arch/arm64/boot/Image
   * DTB: arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb
+
   * DTB: arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dtb (for R-Car H3)
 +
  * DTB: arch/arm64/boot/dts/renesas/r8a77960-salvator-xs.dtb (for R-Car M3-W)
 +
  * DTB: arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dtb (for R-Car M3-W+)
 +
  * DTB: arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb (for R-Car M3-N)
  
 
U-Boot boot command:
 
U-Boot boot command:
 
<pre>
 
<pre>
tftpboot 0x48080000 Image
+
tftpboot 0x50000000 Image
tftpboot 0x49f00000 r8a7795-salvator-xs.dtb
+
tftpboot 0x58000000 r8a77951-salvator-xs.dtb (for R-Car H3)
booti 0x48080000 - 0x49f00000
+
tftpboot 0x58000000 r8a77960-salvator-xs.dtb (for R-Car M3-W)
 +
tftpboot 0x58000000 r8a77961-salvator-xs.dtb (for R-Car M3-W+)
 +
tftpboot 0x58000000 r8a77965-salvator-xs.dtb (for R-Car M3-N)
 +
booti 0x50000000 - 0x58000000
 +
</pre>
 +
 
 +
Kernel v5.5 and older used different DTB names:
 +
  * DTB: arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb (for R-Car H3)
 +
  * DTB: arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb (for R-Car M3-W)
 +
  * DTB: arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb (for R-Car M3-N)
 +
 
 +
= Suspend-to-RAM =
 +
 
 +
== PSCI System Suspend ==
 +
 
 +
The system can be suspended by triggering a PSCI System Suspend:
 +
<pre>
 +
echo mem > /sys/power/state
 +
</pre>
 +
 
 +
Caveats:
 +
* Before you can use the above, you must configure the PMIC for DDR Backup Mode first, using the command below, followed by switching SW23 off:
 +
<pre>
 +
echo on > /sys/bus/i2c/drivers/bd9571mwv/*/bd9571mwv-regulator*/backup_mode
 +
</pre>
 +
* On kernels up to and including v4.18, the "backup_mode" sysfs file doesn't exist.  Hence you must use i2cset instead, and repeat this operation after each wake-up:
 +
<pre>
 +
i2cset -f -y 7 0x30 0x20 0x0F
 +
</pre>
 +
* PSCI System Suspend supports wake-up by PMIC only. Switch SW23 on to resume the system.
 +
 
 +
== Suspend-to-Idle ==
 +
 
 +
If you want to suspend the system, and wake up through other wake-up sources,
 +
you must use Suspend-to-Idle instead of PSCI System Suspend.
 +
 
 +
The system can be suspended ("frozen") using:
 +
<pre>
 +
echo freeze > /sys/power/state
 +
</pre>
 +
 
 +
Alternatively (since v4.10), you can configure the system to use Suspend-to-Idle by default:
 +
<pre>
 +
echo s2idle > /sys/power/mem_sleep
 +
</pre>
 +
 
 +
After that, you can suspend the system using the standard:
 +
<pre>
 +
echo mem > /sys/power/state
 +
</pre>
 +
 
 +
== Wake-Up Sources ==
 +
 
 +
Suspend-to-Idle supports the following wake-up sources:
 +
 
 +
* gpio-keys: Not enabled in the upstream kernel due to sharing of GPIOs between switches and LEDs, but see [[#Remote Control|Remote Control]] below.
 +
* ravb (Ethernet): Configure using one of:
 +
<pre>
 +
ethtool -s eth0 wol g # Enable wake on MagicPacket
 +
ethtool -s eth0 wol d # Disable
 +
</pre>
 +
Wake-up by sending a MagicPacket from another system using:
 +
<pre>
 +
wakeonlan <mac-address> | <hostname> | <ip-address> # <hostname> or <ip-address> must be in /etc/ethers
 
</pre>
 
</pre>
 +
* sh-sci (Serial): Disabled by default
 +
* usb: Disabled by default
  
== Remote Control ==
+
= Remote Control =
  
 
{| class="wikitable"
 
{| class="wikitable"
Line 52: Line 127:
 
|EXIO-D pin 46
 
|EXIO-D pin 46
 
|Samtec QTE-020 or -040
 
|Samtec QTE-020 or -040
|Needs [https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=topic/board-farm&id=70f58c8b8c920b10913ea4dd442587e35e996e9b arm64: dts: salvator-common: Enable GP2_1 for wake-up]
+
|Needs ''arm64: dts: salvator-common: Enable GP2_1 for wake-up'' from [https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/board-farm renesas-drivers#topic/board-farm]
 
|-
 
|-
 
|ACC OFF
 
|ACC OFF
Line 60: Line 135:
 
|CN7 pin 4
 
|CN7 pin 4
 
|Samtec QTE-020 or -040, and 5¼ HDD power
 
|Samtec QTE-020 or -040, and 5¼ HDD power
|Pull high '''via 10K resistor''' to power off
+
|Pull high '''via 10K resistor''' to power off (47K to D12.0V might be better, cfr. [[R-Car/Boards/Ebisu|Ebisu]], but is untested)
 +
|}
 +
 
 +
= An Experiment in U-Boot for Cortex-R7 =
 +
R-Car Gen3 currently boots up using Cortex-A cores
 +
 
 +
<pre>
 +
[Boot ROM(CA57)] --> [BL2(CA57)] --> [U-Boot(CA57)] --> [Linux kernel(CA57]
 +
</pre>
 +
 
 +
R-Car Gen3 has two Cortex-R7 cores and it could be used for booting as well.
 +
This experiment attempts to boot R-Car Gen3 up using a
 +
Cortex-R7 core. The boot sequence of this experiment will be like this:
 +
 
 +
<pre>
 +
[Boot ROM(CR7)] --> [CR7 Loader(CR7)] --> [U-Boot(CR7)] --> [RTOS(CR7)]
 +
                                            `--> [BL2(CA57)] --> [U-Boot(CA57)]
 +
</pre>   
 +
 
 +
To do this, a simple tarball called ''rcg3-cr7-uboot''([[File:Rcg3-cr7-uboot-20210420.tar.bz2]]) is provided.
 +
''rcg3-cr7-uboot'' package includes patches related to Cortex-R7 and provides a makefile to help to build sources.
 +
 
 +
This section describes how to build sources and test it on the Salvator-XS.
 +
 
 +
== Prerequisite ==
 +
''rcg3-cr7-uboot'' uses the Renesas Cortex-R7 Loader package. You should contact Renesas
 +
to get ''Cortex-R7 Loader'' since this is a proprietary package. After procuring ''Cortex-R7 Loader'',
 +
these two files, ''CortexR7_Loader_20191220.tar.gz'' and ''Dummy_RTOS_0615.tar.gz'', must be copied into
 +
the ''tarballs'' directory.
 +
 
 +
== Compilation ==
 +
 
 +
=== With an installed toolchain ===
 +
If you already have an development environment for Cortex-R7, you could use
 +
it. If you don't have a toolchain, you could get it here
 +
[[https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm Cortex-RM Toolchain]].
 +
''Git'' must be installed because ''rcg3-cr7-uboot'' uses it for patching and
 +
managing code. In addition, you should install ''bison'' and ''flex'' to build U-Boot.
 +
To build source, type it.
 +
<pre>
 +
make all
 +
</pre>
 +
Generated files needed will be copied into the ''artifacts'' directory.
 +
 
 +
=== With Docker ===
 +
You could use Docker to build sources as well. The built files will be
 +
located in the ''artifacts'' directory.
 +
<pre>
 +
make docker-build
 +
</pre>
 +
 
 +
== Flashing ==
 +
 
 +
After building sources, a few files generated by ''rcg3-cr7-uboot'' must be written into the HyperFlash
 +
memory on the System in Package.
 +
 
 +
# '''bootparam_sa0.srec''': It has information used by an Initial Program Loader resided in the ''BootROM''
 +
# '''cr7_loader.srec''': It's a SREC-formatted blob file which contains a binary. The binary, Renesas CR7 Loader, is a some kind of Secondary Program Loader running on Cortex-R7.
 +
# '''cert_header_sa3.srec''': It has information about the text and sector address of U-Boot to be loaded by ''CR7 Loader''.
 +
# '''u-boot.srec''': It' a SREC-formatted blob file which contains an U-Boot binary.
 +
 
 +
In here, ''MiniMonitor'' is used for flashing them. Please consult
 +
[[https://elinux.org/R-Car/Boards/H3SK Sterter Kit]] for how to use ''MiniMonitor''.
 +
 
 +
Please note that the configuration of DIP switches is different between Stater Kit and Salvator-XS.
 +
Here is information about DIP switches for Salvator-XS
 +
 
 +
* To run ''MiniMonitor''
 +
<pre>
 +
SW1[all]  = [On]
 +
SW2[all]  = [On]
 +
SW3      = Off
 +
SW10[1:8] = [On, On, On, On, On, Off, On, On]
 +
</pre>
 +
 
 +
* To enable HyperFlash memory
 +
<pre>
 +
SW1[all]  = [Off]
 +
SW2[all]  = [Off]
 +
SW3      = On
 +
</pre>
 +
 
 +
* To use Cortex-R7 and HyperFlash memory
 +
<pre>
 +
SW1[all]  = [Off]
 +
SW2[all]  = [Off]
 +
SW3      = On
 +
SW10[1:8] = [Off, Off, On, On, On, On, Off, Off]
 +
</pre>
 +
 
 +
Please following the instruction of ''MiniMointor''.
 +
This is messages of ''MiniMonitor'' when writing ''bootparam_sa0.srec''
 +
 
 +
<pre>
 +
R-Car Gen3 MiniMonitor H3ES2.0/M3ES1.1 V0.04 2017.02.28
 +
Work Memory  : SystemRAM (H'E6328000-H'E632FFFF)
 +
Board Name  : Salvator
 +
Product Code : R-Car H3 ES20 .00
 +
 
 +
>xls2
 +
===== Qspi/HyperFlash writing of Gen3 Board Command =============
 +
Load Program to Spiflash
 +
Writes to any of SPI address.
 +
Please select,FlashMemory.
 +
  1 : QspiFlash      (U5 : S25FS128S)
 +
  2 : QspiFlash Board (CN3: S25FL512S)
 +
  3 : HyperFlash      (SiP internal)
 +
  Select (1-3)>3
 +
SW1 SW2 All OFF!  Setting OK? (Push Y key)
 +
SW3 ON!            Setting OK? (Push Y key)
 +
READ ID OK.
 +
Program Top Address & Qspi/HyperFlash Save Address
 +
===== Please Input Program Top Address ============
 +
  Please Input : H'E6320000
 +
 +
===== Please Input Qspi/HyperFlash Save Address ===
 +
  Please Input : H'0
 +
Work RAM(H'50000000-H'53FFFFFF) Clear....
 +
please send ! ('.' & CR stop load)
 +
SPI Data Clear(H'FF) Check :H'00000000-0003FFFF,Clear OK?(y/n)
 +
H'00000000-0003FFFF Erasing..Erase Completed
 +
SAVE SPI-FLASH....... complete!
 +
 
 +
======= Qspi/HyperFlash Save Information  =================
 +
SpiFlashMemory Stat Address : H'00000000
 +
SpiFlashMemory End Address  : H'00000E67
 +
===========================================================
 +
 
 +
>
 +
</pre>
 +
 
 +
This is information about text addresses of binaries and HyperFlash sector addresses.
 +
{| class="wikitable"
 +
|-
 +
! Filename !! Program Top Address !! Flash Save Address !! Source
 +
|-
 +
| '''bootparam_sa0.srec''' || 0xE6320000 || 0x00000000 || CR7 Loader
 +
|-
 +
| '''cr7_loader.srec''' || 0xE6304000 || 0x00040000 || CR7 Loader
 +
|-
 +
| '''cert_header_sa3.srec''' || 0xE6320000 || 0x000C0000 || CR7 Loader
 +
|-
 +
| '''u-boot.srec''' || 0x51000000 || 0x00740000 || U-Boot
 +
|}
 +
 
 +
Please note that BL2 and BL31 of Arm Trusted Firmware must be rewritten because BL2 is replaced
 +
with CR7 Loader.
 +
{| class="wikitable"
 +
|-
 +
! Filename !! Program Top Address !! Flash Save Address !! Source
 +
|-
 +
| '''bl2-salvator-x.srec''' || 0xE6304000 || 0x00100000 || Renesas Yocto
 +
|-
 +
| '''bl31-salvator-x.srec''' || 0x44000000 || 0x001C0000 || Renesas Yocto
 
|}
 
|}
 +
 +
== Using U-Boot for Cortex-R7 ==
 +
If all binaries have successfully been flashed
 +
and SW1, SW2, SW3 and SW10 DIP switches are configured to enable Cortex-R7 and HyperFlash memory,
 +
<pre>
 +
SW1[all]  = [Off]
 +
SW2[all]  = [Off]
 +
SW3      = On
 +
SW10[1:8] = [Off, Off, On, On, On, On, Off, Off]
 +
</pre>
 +
the U-Boot prompt would be appeared on your serial terminal after powering up a Salvator-XS board.
 +
 +
<pre>
 +
NOTICE:  R-Car Gen3 Initial Program Loader(CR7) Rev.1.0.14a
 +
NOTICE:  Built : 04:12:33, Apr 13 2021
 +
NOTICE:  PRR is R-Car H3 Ver2.0
 +
NOTICE:  LCM state is CM
 +
NOTICE:  BL2: DDR3200(rev.0.39)
 +
NOTICE:  BL2: [COLD_BOOT]
 +
NOTICE:  BL2: DRAM Split is 4ch
 +
NOTICE:  BL2: QoS is default setting(rev.0.21)
 +
NOTICE:  BL2: DRAM refresh interval 1.95 usec
 +
NOTICE:  BL2: Periodic Write DQ Training
 +
NOTICE:  R-Car Gen3 tcm loader(CR7)
 +
NOTICE:  Normal boot(CR7)
 +
NOTICE:  RTOS load address=0x51000000 RTOS image size=0x00400000
 +
 +
 +
U-Boot 2020.01-cr7-0.1-00006-g409eea96c3 (Apr 13 2021 - 04:12:39 +0000)
 +
 +
CPU: Renesas Electronics R8A7795 rev 2.0
 +
Model: Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+
 +
DRAM:  896 MiB
 +
Bank #0: 0x048000000 - 0x07fffffff, 896 MiB
 +
 +
MMC:  sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2
 +
Loading Environment from MMC... OK
 +
In:    serial@e6e88000
 +
Out:  serial@e6e88000
 +
Err:  serial@e6e88000
 +
Net:  eth0: ethernet@e6800000
 +
Hit any key to stop autoboot: 3
 +
(CR7) =>
 +
</pre>
 +
 +
=== Speeding up a development using TFTP ===
 +
 +
In short, this is an example of setting up U-Boot to use TFTP.
 +
<pre>
 +
(CR7) => setenv ethact 'ravb'
 +
(CR7) => setenv ethaddr '2e:09:0a:00:a3:41'
 +
(CR7) => setenv ipaddr '192.168.0.200'
 +
(CR7) => setenv serverip '192.168.0.14'
 +
</pre>
 +
 +
After setting up U-Boot, you could download a file like this:
 +
<pre>
 +
(CR7) => tftp 0x48000000 dummy_rtos.bin
 +
Using ethernet@e6800000 device
 +
TFTP from server 192.168.0.14; our IP address is 192.168.0.200
 +
Filename 'dummy_rtos.bin'.
 +
Load address: 0x48000000
 +
Loading: *####
 +
        2.8 MiB/s
 +
done
 +
Bytes transferred = 49152 (c000 hex)
 +
</pre>
 +
 +
=== Running a binary ===
 +
U-Boot could run a binary by directly setting up processor's registers. This is
 +
an example how to run the Dummy RTOS of Renesas using U-Boot.
 +
<pre>
 +
(CR7) => setenv rtos_boot_addr 0x48000000
 +
(CR7) => tftp 0x48000000 dummy_rtos.bin
 +
Using ethernet@e6800000 device
 +
TFTP from server 192.168.0.14; our IP address is 192.168.0.200
 +
Filename 'dummy_rtos.bin'.
 +
Load address: 0x48000000
 +
Loading: *####
 +
        2.8 MiB/s
 +
done
 +
Bytes transferred = 49152 (c000 hex)
 +
(CR7) => bootrtos
 +
Running RTOS: boot address = 0x48000000
 +
 +
NOTICE:  R-Car Gen3 Dummy RTOS(CR7)
 +
NOTICE:  PRR is R-Car H3 ES2.0
 +
NOTICE:  MIDR = (0x410fc171)
 +
NOTICE:  CBAR = (0xf0000000)
 +
NOTICE:  CPSR = (0x600001d3)
 +
NOTICE:  Dummy RTOS boot end
 +
</pre>
 +
 +
The '''bootrtos''' command has been added to U-Boot for Cortex-R7. '''bootrtos''' refers
 +
the ''rtos_boot_addr'' environment variable so you must set up this variable
 +
according to the text address of a binary that you want to run.
 +
 +
=== Bringing up Cortex-A ===
 +
The '''caup''' command has been added to U-Boot for Cortex-R7 as well to bring up Cortex-A.
 +
If you execute the '''caup''' command, U-Boot for Cortex-A would be appeared.
 +
<pre>
 +
(CR7) => caup
 +
CPU0 will be powered up (base addr = 0x00000000e6304000)
 +
CPU0 has been powered up.We don't need to power it up.
 +
(CR7) =>
 +
 +
U-Boot 2015.04 (Oct 23 2018 - 17:56:46)
 +
 +
CPU: Renesas Electronics R8A7795 rev 2.0
 +
Board: Salvator-X
 +
I2C:  ready
 +
DRAM:  3.9 GiB
 +
Bank #0: 0x048000000 - 0x07fffffff, 896 MiB
 +
Bank #1: 0x500000000 - 0x53fffffff, 1 GiB
 +
Bank #2: 0x600000000 - 0x63fffffff, 1 GiB
 +
Bank #3: 0x700000000 - 0x73fffffff, 1 GiB
 +
 +
MMC:  sh-sdhi: 0, sh-sdhi: 1, sh-sdhi: 2
 +
In:    serial
 +
Out:  serial
 +
Err:  serial
 +
Net:  ravb
 +
Hit any key to stop autoboot:  3
 +
=> version
 +
 +
U-Boot 2015.04 (Oct 23 2018 - 17:56:46)
 +
aarch64-poky-linux-gcc (GCC) 7.3.0
 +
GNU ld (GNU Binutils) 2.29.1.20170915
 +
=>
 +
</pre>
 +
From here, you could boot up Linux or do something else.
 +
 +
There is an issue regarding the serial port. Arm Trusted Firmware by Renesas
 +
doesn't seem to enable the clock of the serial port so TF-A’s messages aren't
 +
displayed after transiting from Cortex-R to Cortex-A.

Latest revision as of 00:35, 20 April 2021

Introduction

This is the Wiki for the Renesas Salvator-XS (Salvator-X 2nd version) board, which is available in different versions, depending on the actual SiP mounted:

  • RTP0RC7795SIPB0012S (with R-Car H3 ES2.0),
  • RTP0RC7796SIPB0012S (with R-Car M3-W),
  • RTP0RC7796SIPB0012SA5A (with R-Car M3-W+, aka R-Car M3-W ES3.0),
  • RTP0RC77965SIPB012S (with R-Car M3-N).

Refer to the R-Car page for information about Renesas' R-Car SoC family.

Serial Console

Use a micro-USB cable to connect to "Debug Serial 0". Serial settings are 115200 8N1.

Unfortunately the CP2102 USB-to-UART bridges on Salvator-XS boards have the same serial strings (0001 resp. 00002 for Debug Serial 0 resp. 1), complicating identifying consoles on multiple boards. If you have multiple boards connected to the same host and you want stable serial ports, there are two options:

  1. Refer to the ports using the symbolic links under /dev/serial/by-path/, instead of the /dev/ttyUSB* names,
  2. Program the ports' serial strings to your liking (e.g. salvator-xs-1884-debug0) using the tool at https://github.com/DiUS/cp210x-cfg, and refer to the ports using the symbolic links under /dev/serial/by-id/, instead of the /dev/ttyUSB* names.

Booting Linux

 * Kernel config: defconfig
 * Kernel image: arch/arm64/boot/Image
 * DTB: arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dtb (for R-Car H3)
 * DTB: arch/arm64/boot/dts/renesas/r8a77960-salvator-xs.dtb (for R-Car M3-W)
 * DTB: arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dtb (for R-Car M3-W+)
 * DTB: arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb (for R-Car M3-N)

U-Boot boot command:

tftpboot 0x50000000 Image
tftpboot 0x58000000 r8a77951-salvator-xs.dtb (for R-Car H3)
tftpboot 0x58000000 r8a77960-salvator-xs.dtb (for R-Car M3-W)
tftpboot 0x58000000 r8a77961-salvator-xs.dtb (for R-Car M3-W+)
tftpboot 0x58000000 r8a77965-salvator-xs.dtb (for R-Car M3-N)
booti 0x50000000 - 0x58000000

Kernel v5.5 and older used different DTB names:

 * DTB: arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb (for R-Car H3)
 * DTB: arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb (for R-Car M3-W)
 * DTB: arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb (for R-Car M3-N)

Suspend-to-RAM

PSCI System Suspend

The system can be suspended by triggering a PSCI System Suspend:

echo mem > /sys/power/state

Caveats:

  • Before you can use the above, you must configure the PMIC for DDR Backup Mode first, using the command below, followed by switching SW23 off:
echo on > /sys/bus/i2c/drivers/bd9571mwv/*/bd9571mwv-regulator*/backup_mode
  • On kernels up to and including v4.18, the "backup_mode" sysfs file doesn't exist. Hence you must use i2cset instead, and repeat this operation after each wake-up:
i2cset -f -y 7 0x30 0x20 0x0F
  • PSCI System Suspend supports wake-up by PMIC only. Switch SW23 on to resume the system.

Suspend-to-Idle

If you want to suspend the system, and wake up through other wake-up sources, you must use Suspend-to-Idle instead of PSCI System Suspend.

The system can be suspended ("frozen") using:

echo freeze > /sys/power/state

Alternatively (since v4.10), you can configure the system to use Suspend-to-Idle by default:

echo s2idle > /sys/power/mem_sleep

After that, you can suspend the system using the standard:

echo mem > /sys/power/state

Wake-Up Sources

Suspend-to-Idle supports the following wake-up sources:

  • gpio-keys: Not enabled in the upstream kernel due to sharing of GPIOs between switches and LEDs, but see Remote Control below.
  • ravb (Ethernet): Configure using one of:
ethtool -s eth0 wol g # Enable wake on MagicPacket
ethtool -s eth0 wol d # Disable

Wake-up by sending a MagicPacket from another system using:

wakeonlan <mac-address> | <hostname> | <ip-address> # <hostname> or <ip-address> must be in /etc/ethers
  • sh-sci (Serial): Disabled by default
  • usb: Disabled by default

Remote Control

Operation Signal A Pin A Signal B Pin B Connector needed Comments
Reset #MRB/SYSRSTn EXIO-D pin 66 GND EXIO-D pin 58 Samtec QTE-020 or -040
Wake-Up IRQ1n/GP2_01 EXIO-D pin 50 GND EXIO-D pin 46 Samtec QTE-020 or -040 Needs arm64: dts: salvator-common: Enable GP2_1 for wake-up from renesas-drivers#topic/board-farm
ACC OFF #RSTB/EX_PWRONn EXIO-D pin 68 D5.0V CN7 pin 4 Samtec QTE-020 or -040, and 5¼ HDD power Pull high via 10K resistor to power off (47K to D12.0V might be better, cfr. Ebisu, but is untested)

An Experiment in U-Boot for Cortex-R7

R-Car Gen3 currently boots up using Cortex-A cores

[Boot ROM(CA57)] --> [BL2(CA57)] --> [U-Boot(CA57)] --> [Linux kernel(CA57]

R-Car Gen3 has two Cortex-R7 cores and it could be used for booting as well. This experiment attempts to boot R-Car Gen3 up using a Cortex-R7 core. The boot sequence of this experiment will be like this:

[Boot ROM(CR7)] --> [CR7 Loader(CR7)] --> [U-Boot(CR7)] --> [RTOS(CR7)]
                                            `--> [BL2(CA57)] --> [U-Boot(CA57)]

To do this, a simple tarball called rcg3-cr7-uboot(File:Rcg3-cr7-uboot-20210420.tar.bz2) is provided. rcg3-cr7-uboot package includes patches related to Cortex-R7 and provides a makefile to help to build sources.

This section describes how to build sources and test it on the Salvator-XS.

Prerequisite

rcg3-cr7-uboot uses the Renesas Cortex-R7 Loader package. You should contact Renesas to get Cortex-R7 Loader since this is a proprietary package. After procuring Cortex-R7 Loader, these two files, CortexR7_Loader_20191220.tar.gz and Dummy_RTOS_0615.tar.gz, must be copied into the tarballs directory.

Compilation

With an installed toolchain

If you already have an development environment for Cortex-R7, you could use it. If you don't have a toolchain, you could get it here [Cortex-RM Toolchain]. Git must be installed because rcg3-cr7-uboot uses it for patching and managing code. In addition, you should install bison and flex to build U-Boot. To build source, type it.

make all

Generated files needed will be copied into the artifacts directory.

With Docker

You could use Docker to build sources as well. The built files will be located in the artifacts directory.

make docker-build

Flashing

After building sources, a few files generated by rcg3-cr7-uboot must be written into the HyperFlash memory on the System in Package.

  1. bootparam_sa0.srec: It has information used by an Initial Program Loader resided in the BootROM
  2. cr7_loader.srec: It's a SREC-formatted blob file which contains a binary. The binary, Renesas CR7 Loader, is a some kind of Secondary Program Loader running on Cortex-R7.
  3. cert_header_sa3.srec: It has information about the text and sector address of U-Boot to be loaded by CR7 Loader.
  4. u-boot.srec: It' a SREC-formatted blob file which contains an U-Boot binary.

In here, MiniMonitor is used for flashing them. Please consult [Sterter Kit] for how to use MiniMonitor.

Please note that the configuration of DIP switches is different between Stater Kit and Salvator-XS. Here is information about DIP switches for Salvator-XS

  • To run MiniMonitor
SW1[all]  = [On]
SW2[all]  = [On]
SW3       = Off
SW10[1:8] = [On, On, On, On, On, Off, On, On]
  • To enable HyperFlash memory
SW1[all]  = [Off]
SW2[all]  = [Off]
SW3       = On
  • To use Cortex-R7 and HyperFlash memory
SW1[all]  = [Off]
SW2[all]  = [Off]
SW3       = On
SW10[1:8] = [Off, Off, On, On, On, On, Off, Off]

Please following the instruction of MiniMointor. This is messages of MiniMonitor when writing bootparam_sa0.srec

R-Car Gen3 MiniMonitor H3ES2.0/M3ES1.1 V0.04 2017.02.28
 Work Memory  : SystemRAM (H'E6328000-H'E632FFFF) 
 Board Name   : Salvator
 Product Code : R-Car H3 ES20 .00 
  
>xls2
===== Qspi/HyperFlash writing of Gen3 Board Command =============
Load Program to Spiflash
Writes to any of SPI address.
Please select,FlashMemory. 
   1 : QspiFlash       (U5 : S25FS128S)
   2 : QspiFlash Board (CN3: S25FL512S)
   3 : HyperFlash      (SiP internal)
  Select (1-3)>3
SW1 SW2 All OFF!   Setting OK? (Push Y key)
SW3 ON!            Setting OK? (Push Y key)
READ ID OK.
Program Top Address & Qspi/HyperFlash Save Address 
===== Please Input Program Top Address ============
  Please Input : H'E6320000
 
===== Please Input Qspi/HyperFlash Save Address ===
  Please Input : H'0
Work RAM(H'50000000-H'53FFFFFF) Clear....
please send ! ('.' & CR stop load)
SPI Data Clear(H'FF) Check :H'00000000-0003FFFF,Clear OK?(y/n)
H'00000000-0003FFFF Erasing..Erase Completed 
SAVE SPI-FLASH....... complete!

======= Qspi/HyperFlash Save Information  =================
 SpiFlashMemory Stat Address : H'00000000
 SpiFlashMemory End Address  : H'00000E67
===========================================================

>

This is information about text addresses of binaries and HyperFlash sector addresses.

Filename Program Top Address Flash Save Address Source
bootparam_sa0.srec 0xE6320000 0x00000000 CR7 Loader
cr7_loader.srec 0xE6304000 0x00040000 CR7 Loader
cert_header_sa3.srec 0xE6320000 0x000C0000 CR7 Loader
u-boot.srec 0x51000000 0x00740000 U-Boot

Please note that BL2 and BL31 of Arm Trusted Firmware must be rewritten because BL2 is replaced with CR7 Loader.

Filename Program Top Address Flash Save Address Source
bl2-salvator-x.srec 0xE6304000 0x00100000 Renesas Yocto
bl31-salvator-x.srec 0x44000000 0x001C0000 Renesas Yocto

Using U-Boot for Cortex-R7

If all binaries have successfully been flashed and SW1, SW2, SW3 and SW10 DIP switches are configured to enable Cortex-R7 and HyperFlash memory,

SW1[all]  = [Off]
SW2[all]  = [Off]
SW3       = On
SW10[1:8] = [Off, Off, On, On, On, On, Off, Off]

the U-Boot prompt would be appeared on your serial terminal after powering up a Salvator-XS board.

NOTICE:  R-Car Gen3 Initial Program Loader(CR7) Rev.1.0.14a
NOTICE:  Built : 04:12:33, Apr 13 2021
NOTICE:  PRR is R-Car H3 Ver2.0
NOTICE:  LCM state is CM
NOTICE:  BL2: DDR3200(rev.0.39)
NOTICE:  BL2: [COLD_BOOT]
NOTICE:  BL2: DRAM Split is 4ch
NOTICE:  BL2: QoS is default setting(rev.0.21)
NOTICE:  BL2: DRAM refresh interval 1.95 usec
NOTICE:  BL2: Periodic Write DQ Training
NOTICE:  R-Car Gen3 tcm loader(CR7)
NOTICE:  Normal boot(CR7)
NOTICE:  RTOS load address=0x51000000 RTOS image size=0x00400000


U-Boot 2020.01-cr7-0.1-00006-g409eea96c3 (Apr 13 2021 - 04:12:39 +0000)

CPU: Renesas Electronics R8A7795 rev 2.0
Model: Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+
DRAM:  896 MiB
Bank #0: 0x048000000 - 0x07fffffff, 896 MiB

MMC:   sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2
Loading Environment from MMC... OK
In:    serial@e6e88000
Out:   serial@e6e88000
Err:   serial@e6e88000
Net:   eth0: ethernet@e6800000
Hit any key to stop autoboot: 3
(CR7) =>

Speeding up a development using TFTP

In short, this is an example of setting up U-Boot to use TFTP.

(CR7) => setenv ethact 'ravb'
(CR7) => setenv ethaddr '2e:09:0a:00:a3:41'
(CR7) => setenv ipaddr '192.168.0.200'
(CR7) => setenv serverip '192.168.0.14'

After setting up U-Boot, you could download a file like this:

(CR7) => tftp 0x48000000 dummy_rtos.bin
Using ethernet@e6800000 device
TFTP from server 192.168.0.14; our IP address is 192.168.0.200
Filename 'dummy_rtos.bin'.
Load address: 0x48000000
Loading: *####
         2.8 MiB/s
done
Bytes transferred = 49152 (c000 hex)

Running a binary

U-Boot could run a binary by directly setting up processor's registers. This is an example how to run the Dummy RTOS of Renesas using U-Boot.

(CR7) => setenv rtos_boot_addr 0x48000000
(CR7) => tftp 0x48000000 dummy_rtos.bin
Using ethernet@e6800000 device
TFTP from server 192.168.0.14; our IP address is 192.168.0.200
Filename 'dummy_rtos.bin'.
Load address: 0x48000000
Loading: *####
         2.8 MiB/s
done
Bytes transferred = 49152 (c000 hex)
(CR7) => bootrtos
Running RTOS: boot address = 0x48000000

NOTICE:  R-Car Gen3 Dummy RTOS(CR7)
NOTICE:  PRR is R-Car H3 ES2.0
NOTICE:  MIDR = (0x410fc171)
NOTICE:  CBAR = (0xf0000000)
NOTICE:  CPSR = (0x600001d3)
NOTICE:  Dummy RTOS boot end

The bootrtos command has been added to U-Boot for Cortex-R7. bootrtos refers the rtos_boot_addr environment variable so you must set up this variable according to the text address of a binary that you want to run.

Bringing up Cortex-A

The caup command has been added to U-Boot for Cortex-R7 as well to bring up Cortex-A. If you execute the caup command, U-Boot for Cortex-A would be appeared.

(CR7) => caup
CPU0 will be powered up (base addr = 0x00000000e6304000)
CPU0 has been powered up.We don't need to power it up.
(CR7) => 

U-Boot 2015.04 (Oct 23 2018 - 17:56:46)

CPU: Renesas Electronics R8A7795 rev 2.0
Board: Salvator-X
I2C:   ready
DRAM:  3.9 GiB
Bank #0: 0x048000000 - 0x07fffffff, 896 MiB
Bank #1: 0x500000000 - 0x53fffffff, 1 GiB
Bank #2: 0x600000000 - 0x63fffffff, 1 GiB
Bank #3: 0x700000000 - 0x73fffffff, 1 GiB

MMC:   sh-sdhi: 0, sh-sdhi: 1, sh-sdhi: 2
In:    serial
Out:   serial
Err:   serial
Net:   ravb
Hit any key to stop autoboot:  3
=> version

U-Boot 2015.04 (Oct 23 2018 - 17:56:46)
aarch64-poky-linux-gcc (GCC) 7.3.0
GNU ld (GNU Binutils) 2.29.1.20170915
=>

From here, you could boot up Linux or do something else.

There is an issue regarding the serial port. Arm Trusted Firmware by Renesas doesn't seem to enable the clock of the serial port so TF-A’s messages aren't displayed after transiting from Cortex-R to Cortex-A.