Difference between revisions of "RZ-G/Boards/SK-RZG1E:Hardware"

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m (USB Function)
 
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USB function mode is possible for Ch0 when SW10 is set to pin 3 side. VBUS from CN2/lower is routed to USB0_OVC/VBUS pin of the Renesas RZ/G1E SoC.
 
USB function mode is possible for Ch0 when SW10 is set to pin 3 side. VBUS from CN2/lower is routed to USB0_OVC/VBUS pin of the Renesas RZ/G1E SoC.
  
Refer to [[RZ/G1E Starter Kit hardware manual]] for more information.<br clear=all>
+
Refer to [[File:RZG1E_Starter_Kit_BoardHardwareManual.pdf]] for more information.<br clear=all>
  
 
=== Debug Serial (CN13) ===
 
=== Debug Serial (CN13) ===

Latest revision as of 13:39, 10 December 2018

This page contains information on the RZ-G/Boards/SK-RZG1E hardware.

Board Layout

Top view
Bottom view

Power Plug

Center Positive 5V connector

The RZ/G1E Starter Kit board uses a 5.5 x 2.1mm barrel 5V power plug. It is a Center Positive power supply, indicating that the center (tip) of the output plug is positive (+) and the outer barrel is negative (-).

Switches and Buttons

Buttons and switches

SW1 (SSI_DATA1 Routing)

Switch pin layout
SW1
Function Pin 1 side (default) Pin 3 side
SSI_SDATA1 Selection
U22
AKM AK4643
Audio Codec
U15
ADV7511
HDMI transmitter

SW1 selects the device to be connected to the SSI_DATA1/ETH_RXD0_B (GP-5-13) pin of the the RZ/G1E SoC. The pin is normally set to receive mode.

Position Function
Pin 1 side
  • Connects the SSI_DATA1/ETH_RXD0_B pin of the RZ/G1E SoC to the SDTO pin 12 of the AK4643
  • The SSI_DATA1 pin of the RZ/G1E SoC must be set to input.
Pin 3 side
  • Connects the SSI_DATA1/ETH_RXD0_B pin of the RZ/G1E SoC to the I2S1 pin (pin 6) of the Analog Devices ADV7511.
  • The SSI_DATA1 pin of the RZ/G1E SoC should be set to output.

SW2 (TRST# Pull-up)

Switch pin layout
SW2
Function Pin 1 side Pin 2 side Pin 3 side
SSI_SDATA1 Selection
Pulled up
Reserved
Pulled down

SW2 selects whether to pull up or down the TRST# pin of the RZ/G1E SoC JTAG interface.

SW3, SW4, SW6 (Push Buttons)

Pushbutton
Button # GPIO pin
SW3 GP-5-10/IRQ9
SW4 GP-5-11
SW5 GP-5-12

The active signal (low or high) for SW3-SW5 is selected by the corresponding bit of POSNEG register. Refer to to the section GPIO in the RZ/G1E Hardware Manual for details.

SW7 (Mode Setting A)

Switch pin layout
SW7
No Function OFF ON
1 MD21
JTAG mode
1
Coresight Debug Port
0
Boundary Scan
1 MD19
DDR3-SDRAM bus clock
1
DD3-1333
0
Prohibited

MD21 determines the JTAG mode. Select OFF position to use JTAG debugger.
MD19 determines the SDRAM clock speed. It must remain in OFF position to select DDR3-1333.

SW9 (SPI Flash Memory Selection)

Switch pin layout
SW9
Function Pin 1 side (default) Pin 3 side
SPI Flash memory selection
64 MB U6
S25FL512SAGMFIG11
4 MB U7
S25FL032P0XMFI011

The RZ/G1E Starter Kit board is equipped with 512 Mbits SPI flash memory (U6: S25FL512SAGMFIG11) and 32 Mbits SPI flash memory (U7: S25FL032P0XMFI011). When SW9 is set to the pin 1 side, the SSL pin of the RZ/1GE SoC to the 512 Mbits flash memory. When SW9 is set to the pin 3 side, the SSL pin of the RZ/G1E SoC to the 32 Mbits flash memory.

SW10 (USB2.0 Channel 0 Host or Function Selection)

Switch pin layout
SW10
Function Pin 1 side (default) Pin 3 side
USB0 mode
USB Host
OVC
USB function
VBUS

SW10 selects the mode of USB port 0 located on top of the USB connector.

Position Function
Pin 1 side
  • USB0 is in host mode (default)
  • USB0_OVC/VBUS pin goes low (0) if an overcurrent is detected on the USB power supply switch BD82065FVJ (U8).
Pin 3 side
  • USB0 is in function mode.
  • VBUS from USB connector (CN2) is connected to the USB0_OVC/VBUS pin of the RZ/G1E SoC.

SW12 (User-Defined Software Switch)

Switch pin layout
SW12
No Function OFF ON
1 bit 0, GP-3-9/AVB_RXD7
0
1
2 bit 1, GP-3-10/AVB_RX_ER
0
1
3 bit 1, GP-3-11/AVB_COL
0
1
4 bit 1, GP-3-12/AVB_TX_EN
0
1

Before using SW12 as a general-purpose input switch, set up the GPSR3 register of the RZ/G1E SoC to select the GPIO function and set the PUPR3 register to enable pulling up. For details, refer to the section on the Pin Function Controller (PFC) in the RZ/G1E Hardware Manual.

LEDs

LD1 (blue): indicates that 5V power has been applied to the board.

LD2 (red): indicates that the board is turned on and has 3.3V power.

Turning On and Off

Special sequence is required for turning on and off the power supply to the RZ/G1E Starter Kit board:

  • To turn ON: Press SW11 once
  • To turn OFF: Long press SW11

Connectors

Video Out

File:G1E TouchscreenConnection.png
Connecting a monitor with touchscreen to the Renesas RZ/G1E Starter Kit board

HDMI (CN6)

The digital RGB888 signal from the RZ/G1E SoC DU0 is connected to Analog Devices ADV7511 HDMI transmitter. The internal registers of ADV7511 are accessible via I2C interface (slave addresses: 0x72 for writring, 0x73 for reading).

The following displays have been tested with the RZ/G1E Starter Kit board:

VGA (CN9)

The digital RGB666 signal from the RZ/G1E SoC DU1 is connected to Analog Devices ADV7123 video D/A converter. This signal is then feed to the CN9 VGA connector.

The following displays have been tested with the RZ/G1E Starter Kit board:


External LCD display (CN8)

File:G1E Connecting-LCD-KIT-B01.png
Connecting LCD-KIT-B01 to the Renesas RZ/G1E Starter Kit board

The Renesas RZ/G1E Starter Kit board has a dedicated connector for LCD-KIT-B01 touchscreen panel.

Datasheet is available in Japanese.

I2C interface is available for getting touchscreen data.

Audio

SSI routing on the Renesas RZ/G1E Starter Kit board

Analog In/Out

AKM AK4643 audio codec is integrated on the Renesas RZ/G1E Starter Kit board.

AK4643 is in slave mode after reset and can be switched to master by writing to a special register via the I2C interface. It is assumed that SSI_DATA0 is set to transmit mode and SSI_SDATA1 is set to receive mode.

HDMI (CN6)

TBD Describe Audio Out through HDMI connector

Debug Interface (CN1)

Pinout of ARM JTAG connector

The Renesas RZ/G1E Starter Kit board includes a 20-pin header for attaching a ARM JTAG debugger. TCK, TDI and TMS have internal 1.8V pull-up resistors. An additional resistor can be soldered to the board to add 1.8V pull-up to the ASEBRK pin. Refer to File:RZG1E Starter Kit BoardHardwareManual.pdf for more information.

MicroSD card slot

The MicroSD card slot (CN4) is connected to the SD card host interface SDHI1 of the RZ/G1E SoC. When GP4_26 is set to 1, power is supplied. When GP4_26 is set to 0, power is shut off.

eMMC

8GB eMMC MTFC8GLWDQ-3M AIT Z (U5) is installed on the Renesas RZ/G1E Starter Kit board. It is connected to the SoC via 8-bit MMC interface.

eMMC is governed by JESD84-B50 standard.

Ethernet

The RZ/G1E Starter Kit board has one 10/100 Ethernet port compliant with IEEE 802.3u. Micrel KSZ8041 (U13) PHY is used, in RMII mode. The port is Auto MDI/MDI-X Since Ethernet AVB and EthetMAC use same pins of the SoC they cannot be used simultaneously. EtherMAC_B can be used with Ethernet AVB.

Video In

The Video Input interface on the RZ/G1E Starter Kit board can be used with misc. sources of standard analog baseband television signals compatible with NTSC, PAL. (For example: traditional analog CCTV or car front/rear cameras, media players)

The video signal from the Video In connector is converted with Analog Devices ADV7180 into 4:2:2 component 8-bit ITU-R BT.656 video data and passed to the RZ/G1E SoC VIN0 interface

USB

USB connector on the Renesas RZ/G1E Starter Kit board

The CN2 USB type A connector has two ports. The upper port is Ch 0 and the lower port is Ch 1. USB 2.0 mode is supported to the corresponding USBx_OVC pin.

In host mode, each port is current-limited at 2.4 A by ROHM BD82065FVJ. Overcurrent is reported to the Renesas RZ/G1E SoC.

USB Host

USB host mode is possible for both Ch 0 and Ch 1. For Ch0, SW10 should be switched to pin 1 side.

USB Function

USB function mode is possible for Ch0 when SW10 is set to pin 3 side. VBUS from CN2/lower is routed to USB0_OVC/VBUS pin of the Renesas RZ/G1E SoC.

Refer to File:RZG1E Starter Kit BoardHardwareManual.pdf for more information.

Debug Serial (CN13)

The Renesas RZ/G1E SoC debug interface SCIF2 is exposed to the microUSB connector (CN13) via Silicon Labs CP2102. Refer to RZ-G/Boards/SK-RZG1E#Booting_over_TFTP_from_U-Boot for configuring and using the interface.

CP2102 is self powered and requires no power over USB. Keep in mind that CP2102 will not be detected by the host PC until the Renesas RZ/G1E Starter Kit board is connected to 5 V power source.

EXIO (JP1, JP2)

Pin locations on EXIO connectors (JP1, JP2) of the Renesas RZ/G1E Starter Kit board

The Renesas RZ/G1E Starter Kit board includes two EXIO connectors. Both are "Box Wafer, 2.0-mm pitch".

JP1 has I2C interface, connected to SDA3/SCL3 of the Renesas RZ/G1E SoC.

List of EXIO Connector (JP1) Pins
Pin Signal Pin Signal
1 MSIOF1_SYNC 2 MSIOF1_SCK
3 MD5/MSIOF1_TXD 4 MISOF1_RXD
5 I2C3_SDA_B 6 I2C3_SCL_B
7 GP3_22 8 GP3_30
9 GND 10 GND
List of EXIO Connector (JP2) Pins
Pin Signal Pin Signal
1 D3.3V 2 GP1_14/TS_SDATA0_B
3 GP1_16/TS_SDEN0_B 4 GP1_17/TS_SPSYNC0_B
5 GP1_15/TS_SCK0_B 6 GND



U17 - Placeholder

U17 can be used to connect Apple Authentication IC (I2C4 on the RZ/G1E)

Integrated WiFi/Bluetooth Module

Information regarding the on-board WiFi/BT module will be made available later (January 2015)

Connecting external USB devices

USB Bluetooth

TBD

USB 3G Modem

TBD

USB Video Camera

TBD

USB HID

TBD

USB Ethernet

TBD

USB GPS

TBD

USB CAN

TBD

USB Radio

TBD